--- /dev/null
+int cpu_has(unsigned short bit)
+{
+ asm goto ("1: jmp %l[t_no]\n" "2:\n" ".section .altinstructions,\"a\"\n"
+ ".balign 4\n" ".long 1b\n" ".long 0\n" ".word %P0\n" ".byte 2b - 1b\n" ".byte 0\n"
+ ".previous\n"::"i" (bit)::t_no);
+ return 1;
+ t_no:return 0;
+}
+
+struct cpuinfo_x86 {
+ unsigned int x86_capability[10];
+};
+extern struct cpuinfo_x86 boot_cpu_data;
+struct i387_fxsave_struct {
+ unsigned short swd;
+};
+struct xsave_struct {
+ int xstate_bv;
+};
+union thread_xstate {
+ struct i387_fxsave_struct fxsave;
+ struct xsave_struct xsave;
+ int xstate_bv;
+};
+struct fpu {
+ union thread_xstate *state;
+};
+__attribute__ ((always_inline)) __attribute__ ((pure))
+int use_xsave(void)
+{
+ return cpu_has(154);
+}
+
+__attribute__ ((always_inline)) __attribute__ ((pure))
+int use_fxsr(void)
+{
+ return cpu_has(24);
+}
+__attribute__ ((always_inline))
+void fpu_save_init(struct fpu *fpu)
+{
+ if (__builtin_constant_p(use_xsave())? use_xsave() : use_xsave()) {
+ if (fpu->state->
+xstate_bv)
+ return;
+ } else if (use_fxsr()) {
+ }
+ if (__builtin_constant_p
+ ((((__builtin_constant_p(fpu->state->fxsave.swd & 1) ?
+ ! !(fpu->state->fxsave.swd & 1) : ( {
+ __builtin_expect(! !
+ (fpu->
+ state->
+ fxsave.
+ swd
+ & (1
+ <<
+ 7)),
+ 1);}
+ )))))?
+ ! !(((__builtin_constant_p(fpu->state->fxsave.swd & 1) ?
+ ! !(fpu->state->fxsave.swd & 1) : ( {
+ __builtin_expect(! !
+ (fpu->
+ state->
+ fxsave.
+ swd
+ &
+ (1
+ <<
+ 7)),
+ 1);}
+ )))): ( {
+ int ______r;
+ ______r =
+ ! !(((__builtin_constant_p(fpu->state->fxsave.swd & 1)
+ ? ! !(fpu->state->fxsave.swd & 1) : ( {
+ ______r =
+ __builtin_expect
+ (! !
+ (fpu->
+ state->
+ fxsave.
+ swd & (1
+ <<
+ 7)),
+ 1);}
+ ))));}
+ ))
+ asm volatile ("fnclex");
+}
+
+void aes_decrypt(void)
+{
+ if (irq_fpu_usable())
+ crypto_aes_decrypt_x86();
+ else
+ fpu_save_init(0);
+}
+
+void (*funcptr)(void) = aes_decrypt;
+
+int aesni_init(void)
+{
+ if (crypto_register_alg())
+ crypto_unregister_alg(0);
+}