]>
Commit | Line | Data |
---|---|---|
5e993f12 | 1 | Index: ADSP-BF535-proc.xml |
2 | =================================================================== | |
3 | RCS file: /cvs/dsptools/sc2/Common/ADspCommon/ArchDef/ADSP-BF535-proc.xml,v | |
4 | retrieving revision 1.33 | |
5 | diff -u -p -r1.33 ADSP-BF535-proc.xml | |
6 | --- ADSP-BF535-proc.xml 19 Apr 2007 06:35:59 -0000 1.33 | |
7 | +++ ADSP-BF535-proc.xml 4 Aug 2007 00:21:55 -0000 | |
8 | @@ -1330,7 +1330,7 @@ | |
9 | <register name="EVT14" type="NORMAL" x="7" y="15"/> | |
10 | <register name="EVT15" type="NORMAL" x="7" y="16"/> | |
11 | </window> | |
12 | -+<window name="Sequencer Status" menu="&Register:&Core:Status:Sequencer Status" description="" format="Hexadecimal" format-selection="All" type="SIM EMU CORE" help-id="0xF" help-tag="HID_Sequencer_Status_Window.htm"> | |
13 | +<window name="Sequencer Status" menu="&Register:&Core:Status:Sequencer Status" description="" format="Hexadecimal" format-selection="All" type="SIM EMU CORE" help-id="0xF" help-tag="HID_Sequencer_Status_Window.htm"> | |
14 | <register name="SEQSTAT" type="NORMAL" x="8" y="0"/> | |
15 | <register name="EXCAUSE" type="NORMAL" x="10" y="2"/> | |
16 | <!--register name="OMODE" type="NORMAL" x="10" y="3"/--> | |
17 | Index: ADSP-BF542-proc.xml | |
18 | =================================================================== | |
19 | RCS file: /cvs/dsptools/sc2/Common/ADspCommon/ArchDef/ADSP-BF542-proc.xml,v | |
20 | retrieving revision 1.14 | |
21 | diff -u -p -r1.14 ADSP-BF542-proc.xml | |
22 | --- ADSP-BF542-proc.xml 14 May 2007 22:24:37 -0000 1.14 | |
23 | +++ ADSP-BF542-proc.xml 4 Aug 2007 00:21:58 -0000 | |
24 | @@ -4796,7 +4796,7 @@ | |
25 | <register name="INPDIS" type="NORMAL" x="10" y="10" /> | |
26 | </window> | |
27 | ||
28 | -<window name="Counter Command Registers" menu="&Register:&Peripherals:Counter:COMMAND" description="" format="Hexadecimal" format-selection="All" type="EMU SIM" help-id="" help-tag="\BF54x-PHWR.chm::/FILE_H_IDH_BF54X_REG_CNT_COMMAND.html" >N | |
29 | +<window name="Counter Command Registers" menu="&Register:&Peripherals:Counter:COMMAND" description="" format="Hexadecimal" format-selection="All" type="EMU SIM" help-id="" help-tag="\BF54x-PHWR.chm::/FILE_H_IDH_BF54X_REG_CNT_COMMAND.html" > | |
30 | <register name="CNT_COMMAND" type="NORMAL" x="11" y="0" /> | |
31 | <register name="W1LCNT" type="NORMAL" x="11" y="2" /> | |
32 | <register name="W1LMIN" type="NORMAL" x="11" y="3" /> | |
33 | Index: ADSP-BF548-proc.xml | |
34 | =================================================================== | |
35 | RCS file: /cvs/dsptools/sc2/Common/ADspCommon/ArchDef/ADSP-BF548-proc.xml,v | |
36 | retrieving revision 1.20 | |
37 | diff -u -p -r1.20 ADSP-BF548-proc.xml | |
38 | --- ADSP-BF548-proc.xml 29 May 2007 20:51:15 -0000 1.20 | |
39 | +++ ADSP-BF548-proc.xml 4 Aug 2007 00:21:58 -0000 | |
40 | @@ -5206,7 +5206,7 @@ | |
41 | <register name="INPDIS" type="NORMAL" x="10" y="10" /> | |
42 | </window> | |
43 | ||
44 | -<window name="Counter Command Registers" menu="&Register:&Peripherals:Counter:COMMAND" description="" format="Hexadecimal" format-selection="All" type="EMU SIM" help-id="" help-tag="\BF54x-PHWR.chm::/FILE_H_IDH_BF54X_REG_CNT_COMMAND.html" >N | |
45 | +<window name="Counter Command Registers" menu="&Register:&Peripherals:Counter:COMMAND" description="" format="Hexadecimal" format-selection="All" type="EMU SIM" help-id="" help-tag="\BF54x-PHWR.chm::/FILE_H_IDH_BF54X_REG_CNT_COMMAND.html" > | |
46 | <register name="CNT_COMMAND" type="NORMAL" x="11" y="0" /> | |
47 | <register name="W1LCNT" type="NORMAL" x="11" y="2" /> | |
48 | <register name="W1LMIN" type="NORMAL" x="11" y="3" /> | |
49 | Index: ADSP-BF6xx-extended.xml | |
50 | =================================================================== | |
51 | RCS file: /cvs/dsptools/sc2/Common/ADspCommon/ArchDef/ADSP-BF6xx-extended.xml,v | |
52 | retrieving revision 1.3 | |
53 | diff -u -p -r1.3 ADSP-BF6xx-extended.xml | |
54 | --- ADSP-BF6xx-extended.xml 25 May 2007 18:14:26 -0000 1.3 | |
55 | +++ ADSP-BF6xx-extended.xml 4 Aug 2007 00:21:58 -0000 | |
56 | @@ -182,11 +182,11 @@ | |
57 | <register name="MDMAFLX0_IRQSTAT_D_PauseChanAct" parent="MDMAFLX0_IRQSTAT_D" bit-position="8" type="" description="child register" bit-size="1"/> | |
58 | <register name="MDMAFLX0_IRQSTAT_D_EndPauseAct" parent="MDMAFLX0_IRQSTAT_D" bit-position="9" type="" description="child register" bit-size="1"/> | |
59 | <register name="MDMAFLX0_IRQSTAT_D_ExtPerCmdInt" parent="MDMAFLX0_IRQSTAT_D" bit-position="10" type="" description="child register" bit-size="1"/> | |
60 | - //[11] reserved | |
61 | +<!-- //[11] reserved --> | |
62 | <register name="MDMAFLX0_IRQSTAT_D_ErrCause" parent="MDMAFLX0_IRQSTAT_D" bit-position="12" type="" description="child register" bit-size="3"/> | |
63 | - //[15] reserved | |
64 | +<!-- //[15] reserved --> | |
65 | <register name="MDMAFLX0_IRQSTAT_D_WrkUnitCnt" parent="MDMAFLX0_IRQSTAT_D" bit-position="16" type="" description="child register" bit-size="8"/> | |
66 | - //[24:31] reserved | |
67 | +<!-- //[24:31] reserved --> | |
68 | <register name="MDMAFLX0_CURXCOUNT_D" group="MEMDMA0 Destination Registers" read-address="0xFFC00E30" write-address="0xFFC00E30" mask="FFFF" type="IO" description="" bit-size="32"/> | |
69 | <register name="MDMAFLX0_CURYCOUNT_D" group="MEMDMA0 Destination Registers" read-address="0xFFC00E38" write-address="0xFFC00E38" mask="FFFF" type="IO" description="" bit-size="32"/> | |
70 | <register name="MDMAFLX0_NxtDscPNTR_S" parent="MDMA_S0_NEXT_DESC_PTR" bit-position="0" type="IO" description="" bit-size="32"/> | |
71 | @@ -227,11 +227,11 @@ | |
72 | <register name="MDMAFLX0_IRQSTAT_S_PauseChanAct" parent="MDMAFLX0_IRQSTAT_S" bit-position="8" type="" description="child register" bit-size="1"/> | |
73 | <register name="MDMAFLX0_IRQSTAT_S_EndPauseAct" parent="MDMAFLX0_IRQSTAT_S" bit-position="9" type="" description="child register" bit-size="1"/> | |
74 | <register name="MDMAFLX0_IRQSTAT_S_ExtPerCmdInt" parent="MDMAFLX0_IRQSTAT_S" bit-position="10" type="" description="child register" bit-size="1"/> | |
75 | - //[11] reserved | |
76 | +<!-- //[11] reserved --> | |
77 | <register name="MDMAFLX0_IRQSTAT_S_ErrCause" parent="MDMAFLX0_IRQSTAT_S" bit-position="12" type="" description="child register" bit-size="3"/> | |
78 | - //[15] reserved | |
79 | +<!-- //[15] reserved --> | |
80 | <register name="MDMAFLX0_IRQSTAT_S_WrkUnitCnt" parent="MDMAFLX0_IRQSTAT_S" bit-position="16" type="" description="child register" bit-size="8"/> | |
81 | - //[24:31] reserved | |
82 | +<!-- //[24:31] reserved --> | |
83 | <register name="MDMAFLX0_CURXCOUNT_S" group="MEMDMA0 Source Registers" read-address="0xFFC00E70" write-address="0xFFC00E70" mask="FFFF" type="IO" description="" bit-size="32"/> | |
84 | <register name="MDMAFLX0_CURYCOUNT_S" group="MEMDMA0 Source Registers" read-address="0xFFC00E78" write-address="0xFFC00E78" mask="FFFF" type="IO" description="" bit-size="32"/> | |
85 | <register name="MDMAFLX1_DMACNFG_D" group="MEMDMA1 Destination Registers" read-address="0xFFC00E88" write-address="0xFFC00E88" mask="FFFF" type="IO" description="" bit-size="32"/> | |
86 | @@ -268,11 +268,11 @@ | |
87 | <register name="MDMAFLX1_IRQSTAT_D_PauseChanAct" parent="MDMAFLX1_IRQSTAT_D" bit-position="8" type="" description="child register" bit-size="1"/> | |
88 | <register name="MDMAFLX1_IRQSTAT_D_EndPauseAct" parent="MDMAFLX1_IRQSTAT_D" bit-position="9" type="" description="child register" bit-size="1"/> | |
89 | <register name="MDMAFLX1_IRQSTAT_D_ExtPerCmdInt" parent="MDMAFLX1_IRQSTAT_D" bit-position="10" type="" description="child register" bit-size="1"/> | |
90 | - //[11] reserved | |
91 | +<!-- //[11] reserved --> | |
92 | <register name="MDMAFLX1_IRQSTAT_D_ErrCause" parent="MDMAFLX1_IRQSTAT_D" bit-position="12" type="" description="child register" bit-size="3"/> | |
93 | - //[15] reserved | |
94 | +<!-- //[15] reserved --> | |
95 | <register name="MDMAFLX1_IRQSTAT_D_WrkUnitCnt" parent="MDMAFLX1_IRQSTAT_D" bit-position="16" type="" description="child register" bit-size="8"/> | |
96 | - //[24:31] reserved | |
97 | +<!-- //[24:31] reserved --> | |
98 | <register name="MDMAFLX1_CURXCOUNT_D" group="MEMDMA1 Destination Registers" read-address="0xFFC00EB0" write-address="0xFFC00EB0" mask="FFFF" type="IO" description="" bit-size="32"/> | |
99 | <register name="MDMAFLX1_CURYCOUNT_D" group="MEMDMA1 Destination Registers" read-address="0xFFC00EB8" write-address="0xFFC00EB8" mask="FFFF" type="IO" description="" bit-size="32"/> | |
100 | <register name="MDMAFLX1_NxtDscPNTR_S" parent="MDMA_S1_NEXT_DESC_PTR" bit-position="0" type="IO" description="" bit-size="32"/> | |
101 | @@ -313,11 +313,11 @@ | |
102 | <register name="MDMAFLX1_IRQSTAT_S_PauseChanAct" parent="MDMAFLX1_IRQSTAT_S" bit-position="8" type="" description="child register" bit-size="1"/> | |
103 | <register name="MDMAFLX1_IRQSTAT_S_EndPauseAct" parent="MDMAFLX1_IRQSTAT_S" bit-position="9" type="" description="child register" bit-size="1"/> | |
104 | <register name="MDMAFLX1_IRQSTAT_S_ExtPerCmdInt" parent="MDMAFLX1_IRQSTAT_S" bit-position="10" type="" description="child register" bit-size="1"/> | |
105 | - //[11] reserved | |
106 | +<!-- //[11] reserved --> | |
107 | <register name="MDMAFLX1_IRQSTAT_S_ErrCause" parent="MDMAFLX1_IRQSTAT_S" bit-position="12" type="" description="child register" bit-size="3"/> | |
108 | - //[15] reserved | |
109 | +<!-- //[15] reserved --> | |
110 | <register name="MDMAFLX1_IRQSTAT_S_WrkUnitCnt" parent="MDMAFLX1_IRQSTAT_S" bit-position="16" type="" description="child register" bit-size="8"/> | |
111 | - //[24:31] reserved | |
112 | +<!-- //[24:31] reserved --> | |
113 | <register name="MDMAFLX1_CURXCOUNT_S" group="MEMDMA1 Source Registers" read-address="0xFFC00EF0" write-address="0xFFC00EF0" mask="FFFF" type="IO" description="" bit-size="32"/> | |
114 | <register name="MDMAFLX1_CURYCOUNT_S" group="MEMDMA1 Source Registers" read-address="0xFFC00EF8" write-address="0xFFC00EF8" mask="FFFF" type="IO" description="" bit-size="32"/> | |
115 | <register name="TIMER0_CONFIG" group="Timer Registers" description="" bit-size="16" read-address="0xFFC00600" write-address="0xFFC00600" mask="FFFF" type="IO"/> | |
116 | Index: ADSP-EDN-BF538-extended.xml | |
117 | =================================================================== | |
118 | RCS file: /cvs/dsptools/sc2/Common/ADspCommon/ArchDef/ADSP-EDN-BF538-extended.xml,v | |
119 | retrieving revision 1.21 | |
120 | diff -u -p -r1.21 ADSP-EDN-BF538-extended.xml | |
121 | --- ADSP-EDN-BF538-extended.xml 19 Apr 2007 05:18:22 -0000 1.21 | |
122 | +++ ADSP-EDN-BF538-extended.xml 4 Aug 2007 00:21:58 -0000 | |
123 | @@ -425,15 +425,15 @@ | |
124 | ||
125 | ||
126 | <!-- DMA0 Channel 2 Registers --> | |
127 | - <register name="DMA2_NEXT_DESC_PTR" group="DMA2 (DMA0 Ch-2) Registers" read-address="0xFFC00C80" write-address="0xFFC00C80" mask="FFFFFFFF" type="IO" description="" bit-size="32" cdef-type="ADDR"/>/> | |
128 | - <register name="DMA2_START_ADDR" group="DMA2 (DMA0 Ch-2) Registers" read-address="0xFFC00C84" write-address="0xFFC00C84" mask="FFFFFFFF" type="IO" description="" bit-size="32" cdef-type="ADDR"/>/> | |
129 | + <register name="DMA2_NEXT_DESC_PTR" group="DMA2 (DMA0 Ch-2) Registers" read-address="0xFFC00C80" write-address="0xFFC00C80" mask="FFFFFFFF" type="IO" description="" bit-size="32" cdef-type="ADDR"/> | |
130 | + <register name="DMA2_START_ADDR" group="DMA2 (DMA0 Ch-2) Registers" read-address="0xFFC00C84" write-address="0xFFC00C84" mask="FFFFFFFF" type="IO" description="" bit-size="32" cdef-type="ADDR"/> | |
131 | <register name="DMA2_CONFIG" group="DMA2 (DMA0 Ch-2) Registers" read-address="0xFFC00C88" write-address="0xFFC00C88" mask="FFFF" type="IO" description="" bit-size="16"/> | |
132 | <register name="DMA2_X_COUNT" group="DMA2 (DMA0 Ch-2) Registers" read-address="0xFFC00C90" write-address="0xFFC00C90" mask="FFFF" type="IO" description="" bit-size="16"/> | |
133 | <register name="DMA2_X_MODIFY" group="DMA2 (DMA0 Ch-2) Registers" read-address="0xFFC00C94" write-address="0xFFC00C94" mask="FFFF" type="IO" description="" bit-size="16" cdef-type="SIGNED"/> | |
134 | <register name="DMA2_Y_COUNT" group="DMA2 (DMA0 Ch-2) Registers" read-address="0xFFC00C98" write-address="0xFFC00C98" mask="FFFF" type="IO" description="" bit-size="16"/> | |
135 | <register name="DMA2_Y_MODIFY" group="DMA2 (DMA0 Ch-2) Registers" read-address="0xFFC00C9C" write-address="0xFFC00C9C" mask="FFFF" type="IO" description="" bit-size="16" cdef-type="SIGNED"/> | |
136 | - <register name="DMA2_CURR_DESC_PTR" group="DMA2 (DMA0 Ch-2) Registers" read-address="0xFFC00CA0" write-address="0xFFC00CA0" mask="FFFFFFFF" type="IO" description="" bit-size="32" cdef-type="ADDR"/>/> | |
137 | - <register name="DMA2_CURR_ADDR" group="DMA2 (DMA0 Ch-2) Registers" read-address="0xFFC00CA4" write-address="0xFFC00CA4" mask="FFFFFFFF" type="IO" description="" bit-size="32" cdef-type="ADDR"/>/> | |
138 | + <register name="DMA2_CURR_DESC_PTR" group="DMA2 (DMA0 Ch-2) Registers" read-address="0xFFC00CA0" write-address="0xFFC00CA0" mask="FFFFFFFF" type="IO" description="" bit-size="32" cdef-type="ADDR"/> | |
139 | + <register name="DMA2_CURR_ADDR" group="DMA2 (DMA0 Ch-2) Registers" read-address="0xFFC00CA4" write-address="0xFFC00CA4" mask="FFFFFFFF" type="IO" description="" bit-size="32" cdef-type="ADDR"/> | |
140 | <register name="DMA2_IRQ_STATUS" group="DMA2 (DMA0 Ch-2) Registers" read-address="0xFFC00CA8" write-address="0xFFC00CA8" mask="FFFF" type="IO" description="" bit-size="16"/> | |
141 | <register name="DMA2_PERIPHERAL_MAP" group="DMA2 (DMA0 Ch-2) Registers" read-address="0xFFC00CAC" write-address="0xFFC00CAC" mask="FFFF" type="IO" description="" bit-size="16"/> | |
142 | <register name="DMA2_CURR_X_COUNT" group="DMA2 (DMA0 Ch-2) Registers" read-address="0xFFC00CB0" write-address="0xFFC00CB0" mask="FFFF" type="IO" description="" bit-size="16"/> |