scummvm random work
[patches.git] / uCam.patch
CommitLineData
5e993f12 1--- uCam.c.orig 2006-10-04 18:44:26.000000000 +0200
2+++ uCam.c 2006-10-04 18:58:00.000000000 +0200
3@@ -387,33 +387,89 @@
4 return IRQ_HANDLED;
5 }
6
7+
8 static irqreturn_t
9 ppifcd_irq_error(
10 int irq,
11 void *dev_id,
12 struct pt_regs *regs )
13 {
14+ u16 status;
15+ size_t count=0;
16+ struct uCam_buffer *tmp_buf;
17 ppi_device_t *pdev = (ppi_device_t*)dev_id;
18- u16 status;
19 BUG_ON(dev_id == NULL);
20
21+ // Acknowledge DMA Interrupt
22+ clear_dma_irqstat(CH_PPI);
23+
24 status = bfin_read_PPI_STATUS();
25
26 #if defined(CONFIG_BF537) || defined(CONFIG_BF536) || defined(CONFIG_BF534)
27 bfin_write_PPI_STATUS(0xFFFF); //BF537/6/4 PPI_STATUS is Write to Clear
28 #endif // CONFIG_BF537/6/4
29
30-
31- DPRINTK("-->ppifcd_irq_error: PPI Status = 0x%X \n", status);
32
33 // disable ppi
34 bfin_write_PPI_CONTROL(pdev->ppi_control & ~PORT_EN);
35
36- DPRINTK("-->ppifcd_irq_error: buf [0x%p]\n", uCam_dev->dma_buf->data);
37+ pdev->done = 1;
38+ DPRINTK("->ppifcd_irq: pdev->done=%d (%ld)\n", pdev->done, jiffies*1000/HZ);
39+
40+ uCam_dev->dma_buf->state = FRAME_DONE;
41+ DPRINTK("->ppifcd_irq: active buffer [0x%p] done\n",
42+ uCam_dev->dma_buf->data);
43+ DPRINTK("->ppifcd_irq: next [0x%p] state %d\n",
44+ uCam_dev->next_buf->data,
45+ uCam_dev->next_buf->state);
46+
47+ if( waitqueue_active(&uCam_dev->dma_buf->wq) )
48+ wake_up_interruptible(&uCam_dev->dma_buf->wq);
49+
50+ if( uCam_dev->next_buf->state == FRAME_READY ) { // if next frame is ready for grabbing
51+ DPRINTK("->ppifcd_irq: initiating next grab [0x%p]\n", uCam_dev->next_buf->data);
52+ tmp_buf = uCam_dev->dma_buf;
53+ uCam_dev->dma_buf = uCam_dev->next_buf;
54+ uCam_dev->next_buf = tmp_buf;
55+ uCam_dev->dma_buf->state = FRAME_GRABBING;
56+ count = ppi2dma(uCam_dev->ppidev, uCam_dev->dma_buf->data, uCam_dev->size);
57+ }
58+
59+ if( pdev->fasyc )
60+ kill_fasync( &(pdev->fasyc), SIGIO, POLLIN );
61+ wake_up_interruptible( pdev->rx_avail );
62
63 return IRQ_HANDLED;
64+
65 }
66
67+//static irqreturn_t
68+//ppifcd_irq_error(
69+// int irq,
70+// void *dev_id,
71+// struct pt_regs *regs )
72+//{
73+// ppi_device_t *pdev = (ppi_device_t*)dev_id;
74+// u16 status;
75+// BUG_ON(dev_id == NULL);
76+//
77+// status = bfin_read_PPI_STATUS();
78+//
79+//#if defined(CONFIG_BF537) || defined(CONFIG_BF536) || defined(CONFIG_BF534)
80+// bfin_write_PPI_STATUS(0xFFFF); //BF537/6/4 PPI_STATUS is Write to Clear
81+//#endif // CONFIG_BF537/6/4
82+//
83+//
84+// DPRINTK("-->ppifcd_irq_error: PPI Status = 0x%X \n", status);
85+//
86+// // disable ppi
87+// bfin_write_PPI_CONTROL(pdev->ppi_control & ~PORT_EN);
88+//
89+// DPRINTK("-->ppifcd_irq_error: buf [0x%p]\n", uCam_dev->dma_buf->data);
90+//
91+// return IRQ_HANDLED;
92+//}
93+
94
95 static int
96 ppi_fasync(