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[patches.git] / 0001-metrologic-fork.patch
1 From 9ecb85954275f5a62293e1416dba107058609117 Mon Sep 17 00:00:00 2001
2 From: Mike Frysinger <vapier@gentoo.org>
3 Date: Tue, 14 Oct 2008 18:06:33 -0400
4 Subject: [PATCH] metrologic fork
5
6 ---
7 u-boot-1.1.6/Makefile | 22 +-
8 u-boot-1.1.6/board/Focus/Focus.c | 516 +++++++++++++++++++
9 u-boot-1.1.6/board/Focus/Makefile | 59 +++
10 u-boot-1.1.6/board/IS4980/IS4980.c | 516 +++++++++++++++++++
11 u-boot-1.1.6/board/IS4980/Makefile | 59 +++
12 u-boot-1.1.6/board/Orbit3/Makefile | 59 +++
13 u-boot-1.1.6/board/Orbit3/Orbit3.c | 516 +++++++++++++++++++
14 u-boot-1.1.6/board/VuQuest2D/Makefile | 59 +++
15 u-boot-1.1.6/board/VuQuest2D/VuQuest2D.c | 418 +++++++++++++++
16 u-boot-1.1.6/board/VuQuest2D/VuQuest2D.h | 53 ++
17 u-boot-1.1.6/board/VuQuest2D/config.mk | 15 +
18 u-boot-1.1.6/board/VuQuest2D/spi.c | 533 ++++++++++++++++++++
19 u-boot-1.1.6/board/VuQuest2D/spi_flash.c | 2 +
20 u-boot-1.1.6/board/VuQuest2D/u-boot.lds.S | 136 +++++
21 u-boot-1.1.6/board/VuQuest2D/video.c | 187 +++++++
22 u-boot-1.1.6/board/VuQuest2D/video.h | 25 +
23 u-boot-1.1.6/common/Makefile | 2 +-
24 u-boot-1.1.6/common/cmd_bdinfo.c | 40 +-
25 u-boot-1.1.6/common/cmd_bootm.c | 13 +
26 u-boot-1.1.6/common/cmd_eeprom.c | 12 +
27 u-boot-1.1.6/common/cmd_load.c | 456 +++++++++++++++++
28 u-boot-1.1.6/common/cmd_mem.c | 96 ++++
29 u-boot-1.1.6/common/interface_select.c | 526 +++++++++++++++++++
30 u-boot-1.1.6/common/main.c | 123 +++++-
31 u-boot-1.1.6/common/metro_pf.c | 318 ++++++++++++
32 u-boot-1.1.6/cpu/blackfin/i2c.c | 36 ++-
33 u-boot-1.1.6/cpu/blackfin/serial.c | 82 +++
34 u-boot-1.1.6/examples/Makefile | 14 +
35 u-boot-1.1.6/include/Metrologic_Hardware.h | 69 +++
36 .../include/asm-blackfin/blackfin-config-post.h | 50 +--
37 .../include/asm-blackfin/blackfin_clocks.h | 56 ++
38 u-boot-1.1.6/include/asm-blackfin/mem_init.h | 338 +++++++++++++
39 u-boot-1.1.6/include/configs/Focus.h | 381 ++++++++++++++
40 u-boot-1.1.6/include/configs/IS4980.h | 378 ++++++++++++++
41 u-boot-1.1.6/include/configs/Orbit3.h | 378 ++++++++++++++
42 u-boot-1.1.6/include/configs/VuQuest2D.h | 309 ++++++++++++
43 u-boot-1.1.6/include/configs/bf533-stamp.h | 47 ++-
44 u-boot-1.1.6/include/configs/bf537-srv1.h | 50 ++-
45 u-boot-1.1.6/include/configs/bf537-stamp.h | 52 ++-
46 u-boot-1.1.6/include/configs/bfin_adi_common.h | 18 +-
47 u-boot-1.1.6/include/flash.h | 3 +-
48 u-boot-1.1.6/include/metro_pf.h | 103 ++++
49 u-boot-1.1.6/lib_blackfin/board.c | 30 ++-
50 u-boot-1.1.6/uses.mak | 5 +
51 44 files changed, 7051 insertions(+), 109 deletions(-)
52 create mode 100644 u-boot-1.1.6/board/Focus/Focus.c
53 create mode 100644 u-boot-1.1.6/board/Focus/Makefile
54 create mode 100644 u-boot-1.1.6/board/IS4980/IS4980.c
55 create mode 100644 u-boot-1.1.6/board/IS4980/Makefile
56 create mode 100644 u-boot-1.1.6/board/Orbit3/Makefile
57 create mode 100644 u-boot-1.1.6/board/Orbit3/Orbit3.c
58 create mode 100644 u-boot-1.1.6/board/VuQuest2D/Makefile
59 create mode 100644 u-boot-1.1.6/board/VuQuest2D/VuQuest2D.c
60 create mode 100644 u-boot-1.1.6/board/VuQuest2D/VuQuest2D.h
61 create mode 100644 u-boot-1.1.6/board/VuQuest2D/config.mk
62 create mode 100644 u-boot-1.1.6/board/VuQuest2D/spi.c
63 create mode 100644 u-boot-1.1.6/board/VuQuest2D/spi_flash.c
64 create mode 100644 u-boot-1.1.6/board/VuQuest2D/u-boot.lds.S
65 create mode 100644 u-boot-1.1.6/board/VuQuest2D/video.c
66 create mode 100644 u-boot-1.1.6/board/VuQuest2D/video.h
67 create mode 100644 u-boot-1.1.6/common/interface_select.c
68 create mode 100644 u-boot-1.1.6/common/metro_pf.c
69 create mode 100644 u-boot-1.1.6/include/Metrologic_Hardware.h
70 create mode 100644 u-boot-1.1.6/include/asm-blackfin/blackfin_clocks.h
71 create mode 100644 u-boot-1.1.6/include/asm-blackfin/mem_init.h
72 create mode 100644 u-boot-1.1.6/include/configs/Focus.h
73 create mode 100644 u-boot-1.1.6/include/configs/IS4980.h
74 create mode 100644 u-boot-1.1.6/include/configs/Orbit3.h
75 create mode 100644 u-boot-1.1.6/include/configs/VuQuest2D.h
76 create mode 100644 u-boot-1.1.6/include/metro_pf.h
77 create mode 100644 u-boot-1.1.6/uses.mak
78
79 diff --git a/u-boot-1.1.6/Makefile b/u-boot-1.1.6/Makefile
80 index b3502bb..e4e761d 100644
81 --- a/u-boot-1.1.6/Makefile
82 +++ b/u-boot-1.1.6/Makefile
83 @@ -1,3 +1,4 @@
84 +include uses.mak
85 #
86 # (C) Copyright 2000-2006
87 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
88 @@ -147,7 +148,7 @@ ifeq ($(ARCH),microblaze)
89 CROSS_COMPILE = mb-
90 endif
91 ifeq ($(ARCH),blackfin)
92 -CROSS_COMPILE = bfin-uclinux-
93 +CROSS_COMPILE = $(CROSS_COMPILE_PATH)/bfin-uclinux-
94 endif
95 ifeq ($(ARCH),avr32)
96 CROSS_COMPILE = avr32-
97 @@ -191,9 +192,21 @@ endif
98 LIBS += lib_$(ARCH)/lib$(ARCH).a
99 LIBS += fs/cramfs/libcramfs.a fs/fat/libfat.a fs/fdos/libfdos.a fs/jffs2/libjffs2.a \
100 fs/reiserfs/libreiserfs.a fs/ext2/libext2fs.a
101 +
102 +ifneq ($(BOARD), IS4980)
103 +ifneq ($(BOARD), Orbit3)
104 +ifneq ($(BOARD), VuQuest2D)
105 +ifneq ($(BOARD), Focus)
106 +ifneq ($(BOARD), bf533-stamp)
107 LIBS += net/libnet.a
108 LIBS += disk/libdisk.a
109 LIBS += rtc/librtc.a
110 +endif
111 +endif
112 +endif
113 +endif
114 +endif
115 +
116 LIBS += dtt/libdtt.a
117 LIBS += drivers/libdrivers.a
118 LIBS += drivers/nand/libnand.a
119 @@ -2264,6 +2277,9 @@ BFIN_BOARDS += cm-bf533 cm-bf537e cm-bf548 cm-bf561
120 # Misc third party boards
121 BFIN_BOARDS += bf537-minotaur bf537-srv1
122
123 +# Metrologic boards
124 +BFIN_BOARDS += Focus Orbit3 VuQuest2D IS4980
125 +
126 $(BFIN_BOARDS:%=%_config) : unconfig
127 @$(MKCONFIG) $(@:_config=) blackfin blackfin $(@:_config=)
128 @[ "$(SRCTREE)" != "$(OBJTREE)" ] && LNPREFIX="../../include2/asm/" || LNPREFIX="" ; \
129 @@ -2321,6 +2337,10 @@ clean:
130 rm -f $(obj)board/cm-bf537e/u-boot.lds
131 rm -f $(obj)board/cm-bf548/u-boot.lds
132 rm -f $(obj)board/cm-bf561/u-boot.lds
133 + rm -f $(obj)board/Focus/u-boot.lds
134 + rm -f $(obj)board/Orbit3/u-boot.lds
135 + rm -f $(obj)board/IS4980/u-boot.lds
136 + rm -f $(obj)board/VuQuest2D/u-boot.lds
137 rm -f $(obj)cpu/blackfin/bootrom-asm-offsets.[chs] $(obj).syms.u-boot.S
138 rm -f $(obj)include/bmp_logo.h
139 rm -f $(obj)nand_spl/u-boot-spl $(obj)nand_spl/u-boot-spl.map
140 diff --git a/u-boot-1.1.6/board/Focus/Focus.c b/u-boot-1.1.6/board/Focus/Focus.c
141 new file mode 100644
142 index 0000000..d2ab196
143 --- /dev/null
144 +++ b/u-boot-1.1.6/board/Focus/Focus.c
145 @@ -0,0 +1,516 @@
146 +/*
147 + * U-boot - Focus.c
148 + *
149 + * Copyright (c) 2008 Metrologic Instruments Inc.
150 + * Copyright (c) 2005-2007 Analog Devices Inc.
151 + *
152 + * (C) Copyright 2000-2004
153 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
154 + *
155 + * See file CREDITS for list of people who contributed to this
156 + * project.
157 + *
158 + * This program is free software; you can redistribute it and/or
159 + * modify it under the terms of the GNU General Public License as
160 + * published by the Free Software Foundation; either version 2 of
161 + * the License, or (at your option) any later version.
162 + *
163 + * This program is distributed in the hope that it will be useful,
164 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
165 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
166 + * GNU General Public License for more details.
167 + *
168 + * You should have received a copy of the GNU General Public License
169 + * along with this program; if not, write to the Free Software
170 + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
171 + * MA 02110-1301 USA
172 + */
173 +
174 +#include <common.h>
175 +#include <config.h>
176 +#include <command.h>
177 +#include <asm/blackfin.h>
178 +#include <asm/io.h>
179 +#include <linux/etherdevice.h>
180 +
181 +#define POST_WORD_ADDR 0xFF903FFC
182 +
183 +int checkboard(void)
184 +{
185 + printf("Board: Metrologic Focus Decode Board\n");
186 + printf(" Support: http://www.metrologic.com/\n");
187 + return 0;
188 +}
189 +
190 +#if defined(CONFIG_BFIN_IDE)
191 +
192 +void cf_outb(unsigned char val, volatile unsigned char *addr)
193 +{
194 + *(addr) = val;
195 + SSYNC();
196 +}
197 +
198 +unsigned char cf_inb(volatile unsigned char *addr)
199 +{
200 + volatile unsigned char c;
201 +
202 + c = *(addr);
203 + SSYNC();
204 +
205 + return c;
206 +}
207 +
208 +void cf_insw(unsigned short *sect_buf, unsigned short *addr, int words)
209 +{
210 + int i;
211 +
212 + for (i = 0; i < words; i++)
213 + *(sect_buf + i) = *(addr);
214 + SSYNC();
215 +}
216 +
217 +void cf_outsw(unsigned short *addr, unsigned short *sect_buf, int words)
218 +{
219 + int i;
220 +
221 + for (i = 0; i < words; i++)
222 + *(addr) = *(sect_buf + i);
223 + SSYNC();
224 +}
225 +#endif /* CONFIG_BFIN_IDE */
226 +
227 +long int initdram(int board_type)
228 +{
229 + DECLARE_GLOBAL_DATA_PTR;
230 +#ifdef DEBUG
231 + int brate;
232 + char *tmp = getenv("baudrate");
233 + brate = simple_strtoul(tmp, NULL, 16);
234 + printf("Serial Port initialized with Baud rate = %x\n", brate);
235 + printf("SDRAM attributes:\n");
236 + printf("tRCD %d SCLK Cycles,tRP %d SCLK Cycles,tRAS %d SCLK Cycles"
237 + "tWR %d SCLK Cycles,CAS Latency %d SCLK cycles \n",
238 + 3, 3, 6, 2, 3);
239 + printf("SDRAM Begin: 0x%x\n", CFG_SDRAM_BASE);
240 + printf("Bank size = %d MB\n", CFG_MAX_RAM_SIZE >> 20);
241 +#endif
242 + gd->bd->bi_memstart = CFG_SDRAM_BASE;
243 + gd->bd->bi_memsize = CFG_MAX_RAM_SIZE;
244 + return CFG_MAX_RAM_SIZE;
245 +}
246 +
247 +int board_get_enetaddr(uchar *mac_addr)
248 +{
249 +#ifdef CFG_NO_FLASH
250 +# define USE_MAC_IN_FLASH 0
251 +#else
252 +# define USE_MAC_IN_FLASH 1
253 +#endif
254 + if (USE_MAC_IN_FLASH) {
255 + /* we cram the MAC in the last flash sector */
256 + uchar *board_mac_addr = (uchar *)0x203F0000;
257 +
258 + if (is_valid_ether_addr(board_mac_addr)) {
259 + memcpy(mac_addr, board_mac_addr, 6);
260 + return 0;
261 + }
262 + }
263 +
264 + puts("Warning: Generating 'random' MAC address\n");
265 +
266 + /* make something up */
267 + const char s[] = __DATE__;
268 + size_t i;
269 + u32 cycles;
270 + for (i = 0; i < 6; ++i) {
271 + asm("%0 = CYCLES;" : "=r" (cycles));
272 + mac_addr[i] = cycles ^ s[i];
273 + }
274 + mac_addr[0] = (mac_addr[0] | 0x02) & ~0x01; /* make it local unicast */
275 + return 0;
276 +}
277 +
278 +void board_reset(void)
279 +{ /* FIXME: Alex Au: Don't know if we need to use this workaround... */
280 + /* workaround for weak pull ups on ssel */
281 + if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER) {
282 + bfin_write_PORTF_FER(bfin_read_PORTF_FER() & ~PF10);
283 + bfin_write_PORTFIO_SET(PF10);
284 + udelay(1);
285 + }
286 +}
287 +
288 +
289 +
290 +#ifdef CONFIG_METROLOGIC_IO_INIT
291 +
292 +int metrologic_io_init(void)
293 +{
294 + /* Port F:
295 +
296 + 0 (out) <<< Host RS232 TX >>>
297 + 1 (in) <<< Host RS232 RX >>>
298 + 2 (out) <<< I/O TX >>> / RDATA [h] (bfin_serial driver takes care of FER)
299 + 3 (in) <<< I/O RX >>> / CLKOUT (bfin_serial driver takes care of FER)
300 + 4 (out) BEEP [l]
301 + 5 (out) Target [l]
302 + 6 (out) cam_sync [l]
303 + 7 (out) PSOC RESET [l]
304 + 8 (in) <<< PPI_VSYNC >>> [later, input]
305 + 9 (in) <<< PPI_HSYNC >>> [later, input]
306 + 10 (out) <<< SPI_CS >>>
307 + 11 (out) <<< SPI_MOSI >>>
308 + 12 (in) <<< SPI_MISO >>>
309 + 13 (out) <<< SPI_CLOCK >>>
310 + 14 (out) SPI_WP [h]
311 + 15 (in) <<< PPI_Clock >>> [later, input]
312 +
313 + */
314 +
315 + *pPORTF_FER = PF0|PF1|PF2|PF3|PF10|PF11|PF12|PF13; /* PPI enabled in image device driver */
316 + *pPORTFIO_DIR |= PF4|PF5|PF6|PF7|PF14;
317 + *pPORTFIO_DIR &= ~(PF8|PF9|PF15);
318 + *pPORTFIO_INEN &= ~(PF4|PF5|PF6|PF7|PF14 | PF8|PF9|PF15);
319 + *pPORTFIO &= ~(PF4|PF5|PF6|PF7);
320 + *pPORTFIO |= PF14;
321 +
322 + /* Port G:
323 +
324 + 0 (in) <<< PPI_Data >>> [later, input]
325 + 1 (in) <<< PPI_Data >>> [later, input]
326 + 2 (in) <<< PPI_Data >>> [later, input]
327 + 3 (in) <<< PPI_Data >>> [later, input]
328 + 4 (in) <<< PPI_Data >>> [later, input]
329 + 5 (in) <<< PPI_Data >>> [later, input]
330 + 6 (in) <<< PPI_Data >>> [later, input]
331 + 7 (in) <<< PPI_Data >>> [later, input]
332 + 8 (out) FOCUS_KBWEN [l] when all I/O are set, then low
333 + 9 (out) HOSTRTS ( Leave as input / output high until polarity is known )
334 + 10 (out) FOCUS_IORTS ( Leave as input / output high until polarity is known )
335 + 11 (out) FOCUS_KBWGATE [l]
336 + 12 (out) LED Voltage Enable [h]
337 + 13 (out) LED yellow [h]
338 + 14 (out) LED white [h]
339 + 15 (out) LED Blue [h]
340 +
341 + */
342 +
343 + *pPORTG_FER = 0;
344 + *pPORTGIO_DIR = PG8|PG9|PG10|PG11|PG12|PG13|PG14|PG15;
345 + *pPORTGIO_INEN = 0;
346 + *pPORTGIO |= PG9|PG10|PG12|PG13|PG14|PG15;
347 + *pPORTGIO &= ~(PG8|PG11);
348 +
349 + /* Port H:
350 +
351 + 0 (out) KBW_PCClk [l]
352 + 1 (out) KBS_PCDATA [l]
353 + 2 (in) IBM_Reset
354 + 3 (in) DTR_IN
355 + 4 (in) PC_DET / IBM/USB_EN
356 + 5 (in) CLKIN
357 + 6 (in) IR_IN
358 + 7 (in) I/O CTS / SDATA
359 + 8 (in) HOST CTS
360 + 9 (in) BUTTON
361 + 10 (in) READ SWITCH
362 + 11 (out) FRAM_WP [h]
363 + 12 (in) IR NEAR / FAR
364 + 13 (out) Ocillator En. (Active high) [h]
365 + 14 (out) Sensor Standby (Active low-Micron) [h]
366 + 15 (out) Sensor Reset (Active High-Micron)[l]
367 +
368 + */
369 +
370 + *pPORTH_FER = 0;
371 + *pPORTHIO_DIR = PH0|PH1|PH11|PH13|PH14|PH15;
372 + *pPORTHIO_INEN = PH2|PH3|PH4|PH5|PH6|PH7|PH8|PH9|PH10|PH12;
373 + *pPORTHIO |= PH11|PH13|PH14;
374 + *pPORTHIO &= ~(PH0|PH1|PH15);
375 +
376 + __builtin_bfin_ssync();
377 +
378 +#if defined(DEBUG_METRO_IO)
379 + printf("start Configure_Interface_IO()\r\n");
380 +#endif
381 + Configure_Interface_IO();
382 +#if defined(DEBUG_METRO_IO)
383 + printf("done Configure_Interface_IO()\r\n");
384 +#endif
385 +
386 + return 0;
387 +
388 +}
389 +
390 +#endif /* CONFIG_METROLOGIC_IO_INIT */
391 +#if defined(CONFIG_MISC_INIT_R)
392 +/* miscellaneous platform dependent initialisations */
393 +int misc_init_r(void)
394 +{
395 +#ifndef CFG_NO_FLASH
396 + /* we use the last sector for the MAC address / POST DXE */
397 + extern flash_info_t flash_info[];
398 + flash_protect(FLAG_PROTECT_SET, 0x203F0000, 0x203FFFFF, &flash_info[0]);
399 +#endif
400 +
401 +#if defined(CONFIG_BFIN_IDE)
402 +#if defined(CONFIG_BFIN_TRUE_IDE)
403 + /* Enable ATASEL when in True IDE mode */
404 + printf("Using CF True IDE Mode\n");
405 + cf_outb(0, (unsigned char *)CONFIG_CF_ATASEL_ENA);
406 + udelay(1000);
407 +#elif defined(CONFIG_BFIN_CF_IDE)
408 + /* Disable ATASEL when we're in Common Memory Mode */
409 + printf("Using CF Common Memory Mode\n");
410 + cf_outb(0, (unsigned char *)CONFIG_CF_ATASEL_DIS);
411 + udelay(1000);
412 +#elif defined(CONFIG_BFIN_HDD_IDE)
413 + printf("Using HDD IDE Mode\n");
414 +#endif
415 + ide_init();
416 +#endif /* CONFIG_BFIN_IDE */
417 + return 0;
418 +}
419 +#endif /* CONFIG_MISC_INIT_R */
420 +
421 +#ifdef CONFIG_POST
422 +#if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_BYPASS)
423 +/* Using sw10-PF5 as the hotkey */
424 +int post_hotkeys_pressed(void)
425 +{
426 + return 0;
427 +}
428 +#else
429 +/* Using sw10-PF5 as the hotkey */
430 +int post_hotkeys_pressed(void)
431 +{
432 + int delay = 3;
433 + int i;
434 + unsigned short value;
435 +
436 + *pPORTF_FER &= ~PF5;
437 + *pPORTFIO_DIR &= ~PF5;
438 + *pPORTFIO_INEN |= PF5;
439 +
440 + printf("########Press SW10 to enter Memory POST########: %2d ", delay);
441 + while (delay--) {
442 + for (i = 0; i < 100; i++) {
443 + value = *pPORTFIO & PF5;
444 + if (value != 0) {
445 + break;
446 + }
447 + udelay(10000);
448 + }
449 + printf("\b\b\b%2d ", delay);
450 + }
451 + printf("\b\b\b 0");
452 + printf("\n");
453 + if (value == 0)
454 + return 0;
455 + else {
456 + printf("Hotkey has been pressed, Enter POST . . . . . .\n");
457 + return 1;
458 + }
459 +}
460 +#endif
461 +#endif
462 +
463 +#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
464 +void post_word_store(ulong a)
465 +{
466 + volatile ulong *save_addr = (volatile ulong *)POST_WORD_ADDR;
467 + *save_addr = a;
468 +}
469 +
470 +ulong post_word_load(void)
471 +{
472 + volatile ulong *save_addr = (volatile ulong *)POST_WORD_ADDR;
473 + return *save_addr;
474 +}
475 +#endif
476 +
477 +#ifdef CONFIG_POST
478 +int uart_post_test(int flags)
479 +{
480 + return 0;
481 +}
482 +
483 +#define BLOCK_SIZE 0x10000
484 +#define VERIFY_ADDR 0x2000000
485 +extern int erase_block_flash(int);
486 +extern int write_data(long lStart, long lCount, uchar * pnData);
487 +int flash_post_test(int flags)
488 +{
489 + unsigned short *pbuf, *temp;
490 + int offset, n, i;
491 + int value = 0;
492 + int result = 0;
493 + printf("\n");
494 + pbuf = (unsigned short *)VERIFY_ADDR;
495 + temp = pbuf;
496 + for (n = FLASH_START_POST_BLOCK; n < FLASH_END_POST_BLOCK; n++) {
497 + offset = (n - 7) * BLOCK_SIZE;
498 + printf("--------Erase block:%2d..", n);
499 + erase_block_flash(n);
500 + printf("OK\r");
501 + printf("--------Program block:%2d...", n);
502 + write_data(CFG_FLASH_BASE + offset, BLOCK_SIZE, pbuf);
503 + printf("OK\r");
504 + printf("--------Verify block:%2d...", n);
505 + for (i = 0; i < BLOCK_SIZE; i += 2) {
506 + if (*(unsigned short *)(CFG_FLASH_BASE + offset + i) !=
507 + *temp++) {
508 + value = 1;
509 + result = 1;
510 + }
511 + }
512 + if (value)
513 + printf("failed\n");
514 + else
515 + printf("OK %3d%%\r",
516 + (int)(
517 + (n + 1 -
518 + FLASH_START_POST_BLOCK) *
519 + 100 / (FLASH_END_POST_BLOCK -
520 + FLASH_START_POST_BLOCK)));
521 +
522 + temp = pbuf;
523 + value = 0;
524 + }
525 + printf("\n");
526 + if (result)
527 + return -1;
528 + else
529 + return 0;
530 +}
531 +
532 +/****************************************************
533 + * LED1 ---- PF6 LED2 ---- PF7 *
534 + * LED3 ---- PF8 LED4 ---- PF9 *
535 + * LED5 ---- PF10 LED6 ---- PF11 *
536 + ****************************************************/
537 +int led_post_test(int flags)
538 +{
539 + *pPORTF_FER &= ~(PF6 | PF7 | PF8 | PF9 | PF10 | PF11);
540 + *pPORTFIO_DIR |= PF6 | PF7 | PF8 | PF9 | PF10 | PF11;
541 + *pPORTFIO_INEN &= ~(PF6 | PF7 | PF8 | PF9 | PF10 | PF11);
542 + *pPORTFIO &= ~(PF6 | PF7 | PF8 | PF9 | PF10 | PF11);
543 + udelay(1000000);
544 + printf("LED1 on");
545 + *pPORTFIO |= PF6;
546 + udelay(1000000);
547 + printf("\b\b\b\b\b\b\b");
548 + printf("LED2 on");
549 + *pPORTFIO |= PF7;
550 + udelay(1000000);
551 + printf("\b\b\b\b\b\b\b");
552 + printf("LED3 on");
553 + *pPORTFIO |= PF8;
554 + udelay(1000000);
555 + printf("\b\b\b\b\b\b\b");
556 + printf("LED4 on");
557 + *pPORTFIO |= PF9;
558 + udelay(1000000);
559 + printf("\b\b\b\b\b\b\b");
560 + printf("LED5 on");
561 + *pPORTFIO |= PF10;
562 + udelay(1000000);
563 + printf("\b\b\b\b\b\b\b");
564 + printf("lED6 on");
565 + *pPORTFIO |= PF11;
566 + printf("\b\b\b\b\b\b\b ");
567 + return 0;
568 +}
569 +
570 +/************************************************
571 + * SW10 ---- PF5 SW11 ---- PF4 *
572 + * SW12 ---- PF3 SW13 ---- PF2 *
573 + ************************************************/
574 +int button_post_test(int flags)
575 +{
576 + int i, delay = 5;
577 + unsigned short value = 0;
578 + int result = 0;
579 +
580 + *pPORTF_FER &= ~(PF5 | PF4 | PF3 | PF2);
581 + *pPORTFIO_DIR &= ~(PF5 | PF4 | PF3 | PF2);
582 + *pPORTFIO_INEN |= (PF5 | PF4 | PF3 | PF2);
583 +
584 + printf("\n--------Press SW10: %2d ", delay);
585 + while (delay--) {
586 + for (i = 0; i < 100; i++) {
587 + value = *pPORTFIO & PF5;
588 + if (value != 0) {
589 + break;
590 + }
591 + udelay(10000);
592 + }
593 + printf("\b\b\b%2d ", delay);
594 + }
595 + if (value != 0)
596 + printf("\b\bOK");
597 + else {
598 + result = -1;
599 + printf("\b\bfailed");
600 + }
601 +
602 + delay = 5;
603 + printf("\n--------Press SW11: %2d ", delay);
604 + while (delay--) {
605 + for (i = 0; i < 100; i++) {
606 + value = *pPORTFIO & PF4;
607 + if (value != 0) {
608 + break;
609 + }
610 + udelay(10000);
611 + }
612 + printf("\b\b\b%2d ", delay);
613 + }
614 + if (value != 0)
615 + printf("\b\bOK");
616 + else {
617 + result = -1;
618 + printf("\b\bfailed");
619 + }
620 +
621 + delay = 5;
622 + printf("\n--------Press SW12: %2d ", delay);
623 + while (delay--) {
624 + for (i = 0; i < 100; i++) {
625 + value = *pPORTFIO & PF3;
626 + if (value != 0) {
627 + break;
628 + }
629 + udelay(10000);
630 + }
631 + printf("\b\b\b%2d ", delay);
632 + }
633 + if (value != 0)
634 + printf("\b\bOK");
635 + else {
636 + result = -1;
637 + printf("\b\bfailed");
638 + }
639 +
640 + delay = 5;
641 + printf("\n--------Press SW13: %2d ", delay);
642 + while (delay--) {
643 + for (i = 0; i < 100; i++) {
644 + value = *pPORTFIO & PF2;
645 + if (value != 0) {
646 + break;
647 + }
648 + udelay(10000);
649 + }
650 + printf("\b\b\b%2d ", delay);
651 + }
652 + if (value != 0)
653 + printf("\b\bOK");
654 + else {
655 + result = -1;
656 + printf("\b\bfailed");
657 + }
658 + printf("\n");
659 + return result;
660 +}
661 +#endif
662 diff --git a/u-boot-1.1.6/board/Focus/Makefile b/u-boot-1.1.6/board/Focus/Makefile
663 new file mode 100644
664 index 0000000..4d03b2c
665 --- /dev/null
666 +++ b/u-boot-1.1.6/board/Focus/Makefile
667 @@ -0,0 +1,59 @@
668 +#
669 +# U-boot - Makefile
670 +#
671 +# Copyright (c) 2005-2007 Analog Device Inc.
672 +#
673 +# (C) Copyright 2000-2006
674 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
675 +#
676 +# See file CREDITS for list of people who contributed to this
677 +# project.
678 +#
679 +# This program is free software; you can redistribute it and/or
680 +# modify it under the terms of the GNU General Public License as
681 +# published by the Free Software Foundation; either version 2 of
682 +# the License, or (at your option) any later version.
683 +#
684 +# This program is distributed in the hope that it will be useful,
685 +# but WITHOUT ANY WARRANTY; without even the implied warranty of
686 +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
687 +# GNU General Public License for more details.
688 +#
689 +# You should have received a copy of the GNU General Public License
690 +# along with this program; if not, write to the Free Software
691 +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
692 +# MA 02111-1307 USA
693 +#
694 +
695 +include $(TOPDIR)/config.mk
696 +
697 +LIB = $(obj)lib$(BOARD).a
698 +
699 +COBJS := $(BOARD).o post-memory.o spi_flash.o cmd_bf537led.o nand.o
700 +#COBJS := $(BOARD).o post-memory.o stm_m25p64.o cmd_bf537led.o nand.o
701 +
702 +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
703 +OBJS := $(addprefix $(obj),$(COBJS))
704 +SOBJS := $(addprefix $(obj),$(SOBJS))
705 +
706 +$(LIB): $(obj).depend $(OBJS) $(SOBJS) u-boot.lds
707 + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
708 +
709 +u-boot.lds: u-boot.lds.S
710 + $(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P -Ubfin $^ > $@.tmp
711 + mv -f $@.tmp $@
712 +
713 +clean:
714 + rm -f $(SOBJS) $(OBJS)
715 +
716 +distclean: clean
717 + rm -f $(LIB) core *.bak .depend
718 +
719 +#########################################################################
720 +
721 +# defines $(obj).depend target
722 +include $(SRCTREE)/rules.mk
723 +
724 +sinclude $(obj).depend
725 +
726 +#########################################################################
727 diff --git a/u-boot-1.1.6/board/IS4980/IS4980.c b/u-boot-1.1.6/board/IS4980/IS4980.c
728 new file mode 100644
729 index 0000000..4836853
730 --- /dev/null
731 +++ b/u-boot-1.1.6/board/IS4980/IS4980.c
732 @@ -0,0 +1,516 @@
733 +/*
734 + * U-boot - Orbit3.c
735 + *
736 + * Copyright (c) 2008 Metrologic Instruments Inc.
737 + * Copyright (c) 2005-2007 Analog Devices Inc.
738 + *
739 + * (C) Copyright 2000-2004
740 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
741 + *
742 + * See file CREDITS for list of people who contributed to this
743 + * project.
744 + *
745 + * This program is free software; you can redistribute it and/or
746 + * modify it under the terms of the GNU General Public License as
747 + * published by the Free Software Foundation; either version 2 of
748 + * the License, or (at your option) any later version.
749 + *
750 + * This program is distributed in the hope that it will be useful,
751 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
752 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
753 + * GNU General Public License for more details.
754 + *
755 + * You should have received a copy of the GNU General Public License
756 + * along with this program; if not, write to the Free Software
757 + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
758 + * MA 02110-1301 USA
759 + */
760 +
761 +#include <common.h>
762 +#include <config.h>
763 +#include <command.h>
764 +#include <asm/blackfin.h>
765 +#include <asm/io.h>
766 +#include <linux/etherdevice.h>
767 +
768 +#define POST_WORD_ADDR 0xFF903FFC
769 +
770 +int checkboard(void)
771 +{
772 + printf("Board: Metrologic Genesis Decode Board\n");
773 + printf(" Support: http://www.metrologic.com/\n");
774 + return 0;
775 +}
776 +
777 +#if defined(CONFIG_BFIN_IDE)
778 +
779 +void cf_outb(unsigned char val, volatile unsigned char *addr)
780 +{
781 + *(addr) = val;
782 + SSYNC();
783 +}
784 +
785 +unsigned char cf_inb(volatile unsigned char *addr)
786 +{
787 + volatile unsigned char c;
788 +
789 + c = *(addr);
790 + SSYNC();
791 +
792 + return c;
793 +}
794 +
795 +void cf_insw(unsigned short *sect_buf, unsigned short *addr, int words)
796 +{
797 + int i;
798 +
799 + for (i = 0; i < words; i++)
800 + *(sect_buf + i) = *(addr);
801 + SSYNC();
802 +}
803 +
804 +void cf_outsw(unsigned short *addr, unsigned short *sect_buf, int words)
805 +{
806 + int i;
807 +
808 + for (i = 0; i < words; i++)
809 + *(addr) = *(sect_buf + i);
810 + SSYNC();
811 +}
812 +#endif /* CONFIG_BFIN_IDE */
813 +
814 +long int initdram(int board_type)
815 +{
816 + DECLARE_GLOBAL_DATA_PTR;
817 +#ifdef DEBUG
818 + int brate;
819 + char *tmp = getenv("baudrate");
820 + brate = simple_strtoul(tmp, NULL, 16);
821 + printf("Serial Port initialized with Baud rate = %x\n", brate);
822 + printf("SDRAM attributes:\n");
823 + printf("tRCD %d SCLK Cycles,tRP %d SCLK Cycles,tRAS %d SCLK Cycles"
824 + "tWR %d SCLK Cycles,CAS Latency %d SCLK cycles \n",
825 + 3, 3, 6, 2, 3);
826 + printf("SDRAM Begin: 0x%x\n", CFG_SDRAM_BASE);
827 + printf("Bank size = %d MB\n", CFG_MAX_RAM_SIZE >> 20);
828 +#endif
829 + gd->bd->bi_memstart = CFG_SDRAM_BASE;
830 + gd->bd->bi_memsize = CFG_MAX_RAM_SIZE;
831 + return CFG_MAX_RAM_SIZE;
832 +}
833 +
834 +int board_get_enetaddr(uchar *mac_addr)
835 +{
836 +#ifdef CFG_NO_FLASH
837 +# define USE_MAC_IN_FLASH 0
838 +#else
839 +# define USE_MAC_IN_FLASH 1
840 +#endif
841 + if (USE_MAC_IN_FLASH) {
842 + /* we cram the MAC in the last flash sector */
843 + uchar *board_mac_addr = (uchar *)0x203F0000;
844 +
845 + if (is_valid_ether_addr(board_mac_addr)) {
846 + memcpy(mac_addr, board_mac_addr, 6);
847 + return 0;
848 + }
849 + }
850 +
851 + puts("Warning: Generating 'random' MAC address\n");
852 +
853 + /* make something up */
854 + const char s[] = __DATE__;
855 + size_t i;
856 + u32 cycles;
857 + for (i = 0; i < 6; ++i) {
858 + asm("%0 = CYCLES;" : "=r" (cycles));
859 + mac_addr[i] = cycles ^ s[i];
860 + }
861 + mac_addr[0] = (mac_addr[0] | 0x02) & ~0x01; /* make it local unicast */
862 + return 0;
863 +}
864 +
865 +void board_reset(void)
866 +{ /* FIXME: Alex Au: Don't know if we need to use this workaround... */
867 + /* workaround for weak pull ups on ssel */
868 + if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER) {
869 + bfin_write_PORTF_FER(bfin_read_PORTF_FER() & ~PF10);
870 + bfin_write_PORTFIO_SET(PF10);
871 + udelay(1);
872 + }
873 +}
874 +
875 +
876 +
877 +#ifdef CONFIG_METROLOGIC_IO_INIT
878 +
879 +int metrologic_io_init(void)
880 +{
881 + /* Port F:
882 +
883 + 0 (out) <<< Host RS232 TX >>>
884 + 1 (in) <<< Host RS232 RX >>>
885 + 2 (out) <<< White LED (PWM) >>> [h] turns on LED
886 + 3 (Out) <<< Blue LED (PWM) >>> [h] turns on LED
887 + 4 (out) BEEP [l]
888 + 5 (out) Target [l]
889 + 6 (out) cam_sync [l]
890 + 7 (out) Force On [l]
891 + 8 (in) <<< PPI_VSYNC >>> [later, input]
892 + 9 (in) <<< PPI_HSYNC >>> [later, input]
893 + 10 (out) <<< SPI_CS >>>
894 + 11 (out) <<< SPI_MOSI >>>
895 + 12 (in) <<< SPI_MISO >>>
896 + 13 (out) <<< SPI_CLOCK >>>
897 + 14 (out) SPI_WP [h]
898 + 15 (in) <<< PPI_Clock >>> [later, input]
899 +
900 + */
901 +
902 + *pPORTF_FER = PF0|PF1|PF10|PF11|PF12|PF13; /* PPI enabled in image device driver */
903 + *pPORTFIO_DIR |= PF4|PF5|PF6|PF7|PF14;
904 + *pPORTFIO_DIR &= ~(PF2|PF3|PF8|PF9|PF15);
905 + *pPORTFIO_INEN &= ~(PF2|PF3|PF4|PF5|PF6|PF7|PF8|PF9|PF14|PF15);
906 + *pPORTFIO &= ~(PF4|PF5|PF6|PF7);
907 + *pPORTFIO |= PF14;
908 +
909 + /* Port G:
910 +
911 + 0 (in) <<< PPI_Data >>> [later, input]
912 + 1 (in) <<< PPI_Data >>> [later, input]
913 + 2 (in) <<< PPI_Data >>> [later, input]
914 + 3 (in) <<< PPI_Data >>> [later, input]
915 + 4 (in) <<< PPI_Data >>> [later, input]
916 + 5 (in) <<< PPI_Data >>> [later, input]
917 + 6 (in) <<< PPI_Data >>> [later, input]
918 + 7 (in) <<< PPI_Data >>> [later, input]
919 + 8 (out) DEC_KB_PASS_EN (Act. L) [l] (switch closed)
920 + 9 (out) HOSTRTS ( Leave as input / output high until polarity is known )
921 + *10 (out) LED_HIGH_V [h] (video low, snap-shot high) / (USB high)
922 + *11 (out) RESET IF (active H) [l]
923 + 12 (out) LED Voltage Enable [h]
924 + 13 (in) USB_KBW_BF (0=KBW;1=USB)
925 + 14 (in) BUF_PC_CLOCK_COL
926 + 15 (in) BUF_BSY_OR_LPD
927 +
928 + */
929 +
930 + *pPORTG_FER = 0;
931 + *pPORTGIO_DIR = PG8|PG9|PG10|PG11|PG12;
932 + *pPORTGIO_INEN = PG13|PG14|PG15;
933 + *pPORTGIO |= PG9|PG10|PG12;
934 + *pPORTGIO &= ~(PG8|PG11);
935 +
936 + /* Port H:
937 +
938 + *0 (in) BUF_PC_DATA_COL
939 + *1 (out) DEC_KB_CLOCK_BASE [l]*
940 + *2 (out) DEC_KB_DATA_BASE [l]*
941 + *3 (out) DEC_PC_CLOCK_BASE [l]*
942 + *4 (out) DEC_PC_DATA_BASE [l]*
943 + *5 (out) DEC_LT_PEN_BASE [l]*
944 + 6 (in) IR_IN
945 + *7 (out) DEC_REQ_UC [l]*
946 + 8 (in) HOST CTS
947 + 9 (in) BUTTON
948 + *10 (in) BUF_SPI_REQ
949 + *11 (in) BUF_EP_FULL_PAUSE
950 + *12 (out) Ocillator En. (Active high) [h]
951 + 13 (out) DC Mode (Active low) [h]
952 + *14 (out) NEAR_SEL [l]
953 + *15 (in) DEC_DTR_FULL
954 +
955 + */
956 +
957 + *pPORTH_FER = 0;
958 + *pPORTHIO_DIR = PH1|PH2|PH3|PH4|PH5|PH7|PH12|PH13|PH14;
959 + *pPORTHIO_INEN = ~(PH1|PH2|PH3|PH4|PH5|PH7|PH12|PH13|PH14);
960 + *pPORTHIO |= PH12|PH13;
961 + *pPORTHIO &= ~(PH1|PH2|PH3|PH4|PH5|PH7|PH14);
962 +
963 + __builtin_bfin_ssync();
964 +
965 +#if defined(DEBUG_METRO_IO)
966 + printf("start Configure_Interface_IO()\r\n");
967 +#endif
968 + Configure_Interface_IO();
969 +#if defined(DEBUG_METRO_IO)
970 + printf("done Configure_Interface_IO()\r\n");
971 +#endif
972 +
973 + return 0;
974 +
975 +}
976 +
977 +#endif /* CONFIG_METROLOGIC_IO_INIT */
978 +#if defined(CONFIG_MISC_INIT_R)
979 +/* miscellaneous platform dependent initialisations */
980 +int misc_init_r(void)
981 +{
982 +#ifndef CFG_NO_FLASH
983 + /* we use the last sector for the MAC address / POST DXE */
984 + extern flash_info_t flash_info[];
985 + flash_protect(FLAG_PROTECT_SET, 0x203F0000, 0x203FFFFF, &flash_info[0]);
986 +#endif
987 +
988 +#if defined(CONFIG_BFIN_IDE)
989 +#if defined(CONFIG_BFIN_TRUE_IDE)
990 + /* Enable ATASEL when in True IDE mode */
991 + printf("Using CF True IDE Mode\n");
992 + cf_outb(0, (unsigned char *)CONFIG_CF_ATASEL_ENA);
993 + udelay(1000);
994 +#elif defined(CONFIG_BFIN_CF_IDE)
995 + /* Disable ATASEL when we're in Common Memory Mode */
996 + printf("Using CF Common Memory Mode\n");
997 + cf_outb(0, (unsigned char *)CONFIG_CF_ATASEL_DIS);
998 + udelay(1000);
999 +#elif defined(CONFIG_BFIN_HDD_IDE)
1000 + printf("Using HDD IDE Mode\n");
1001 +#endif
1002 + ide_init();
1003 +#endif /* CONFIG_BFIN_IDE */
1004 + return 0;
1005 +}
1006 +#endif /* CONFIG_MISC_INIT_R */
1007 +
1008 +#ifdef CONFIG_POST
1009 +#if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_BYPASS)
1010 +/* Using sw10-PF5 as the hotkey */
1011 +int post_hotkeys_pressed(void)
1012 +{
1013 + return 0;
1014 +}
1015 +#else
1016 +/* Using sw10-PF5 as the hotkey */
1017 +int post_hotkeys_pressed(void)
1018 +{
1019 + int delay = 3;
1020 + int i;
1021 + unsigned short value;
1022 +
1023 + *pPORTF_FER &= ~PF5;
1024 + *pPORTFIO_DIR &= ~PF5;
1025 + *pPORTFIO_INEN |= PF5;
1026 +
1027 + printf("########Press SW10 to enter Memory POST########: %2d ", delay);
1028 + while (delay--) {
1029 + for (i = 0; i < 100; i++) {
1030 + value = *pPORTFIO & PF5;
1031 + if (value != 0) {
1032 + break;
1033 + }
1034 + udelay(10000);
1035 + }
1036 + printf("\b\b\b%2d ", delay);
1037 + }
1038 + printf("\b\b\b 0");
1039 + printf("\n");
1040 + if (value == 0)
1041 + return 0;
1042 + else {
1043 + printf("Hotkey has been pressed, Enter POST . . . . . .\n");
1044 + return 1;
1045 + }
1046 +}
1047 +#endif
1048 +#endif
1049 +
1050 +#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
1051 +void post_word_store(ulong a)
1052 +{
1053 + volatile ulong *save_addr = (volatile ulong *)POST_WORD_ADDR;
1054 + *save_addr = a;
1055 +}
1056 +
1057 +ulong post_word_load(void)
1058 +{
1059 + volatile ulong *save_addr = (volatile ulong *)POST_WORD_ADDR;
1060 + return *save_addr;
1061 +}
1062 +#endif
1063 +
1064 +#ifdef CONFIG_POST
1065 +int uart_post_test(int flags)
1066 +{
1067 + return 0;
1068 +}
1069 +
1070 +#define BLOCK_SIZE 0x10000
1071 +#define VERIFY_ADDR 0x2000000
1072 +extern int erase_block_flash(int);
1073 +extern int write_data(long lStart, long lCount, uchar * pnData);
1074 +int flash_post_test(int flags)
1075 +{
1076 + unsigned short *pbuf, *temp;
1077 + int offset, n, i;
1078 + int value = 0;
1079 + int result = 0;
1080 + printf("\n");
1081 + pbuf = (unsigned short *)VERIFY_ADDR;
1082 + temp = pbuf;
1083 + for (n = FLASH_START_POST_BLOCK; n < FLASH_END_POST_BLOCK; n++) {
1084 + offset = (n - 7) * BLOCK_SIZE;
1085 + printf("--------Erase block:%2d..", n);
1086 + erase_block_flash(n);
1087 + printf("OK\r");
1088 + printf("--------Program block:%2d...", n);
1089 + write_data(CFG_FLASH_BASE + offset, BLOCK_SIZE, pbuf);
1090 + printf("OK\r");
1091 + printf("--------Verify block:%2d...", n);
1092 + for (i = 0; i < BLOCK_SIZE; i += 2) {
1093 + if (*(unsigned short *)(CFG_FLASH_BASE + offset + i) !=
1094 + *temp++) {
1095 + value = 1;
1096 + result = 1;
1097 + }
1098 + }
1099 + if (value)
1100 + printf("failed\n");
1101 + else
1102 + printf("OK %3d%%\r",
1103 + (int)(
1104 + (n + 1 -
1105 + FLASH_START_POST_BLOCK) *
1106 + 100 / (FLASH_END_POST_BLOCK -
1107 + FLASH_START_POST_BLOCK)));
1108 +
1109 + temp = pbuf;
1110 + value = 0;
1111 + }
1112 + printf("\n");
1113 + if (result)
1114 + return -1;
1115 + else
1116 + return 0;
1117 +}
1118 +
1119 +/****************************************************
1120 + * LED1 ---- PF6 LED2 ---- PF7 *
1121 + * LED3 ---- PF8 LED4 ---- PF9 *
1122 + * LED5 ---- PF10 LED6 ---- PF11 *
1123 + ****************************************************/
1124 +int led_post_test(int flags)
1125 +{
1126 + *pPORTF_FER &= ~(PF6 | PF7 | PF8 | PF9 | PF10 | PF11);
1127 + *pPORTFIO_DIR |= PF6 | PF7 | PF8 | PF9 | PF10 | PF11;
1128 + *pPORTFIO_INEN &= ~(PF6 | PF7 | PF8 | PF9 | PF10 | PF11);
1129 + *pPORTFIO &= ~(PF6 | PF7 | PF8 | PF9 | PF10 | PF11);
1130 + udelay(1000000);
1131 + printf("LED1 on");
1132 + *pPORTFIO |= PF6;
1133 + udelay(1000000);
1134 + printf("\b\b\b\b\b\b\b");
1135 + printf("LED2 on");
1136 + *pPORTFIO |= PF7;
1137 + udelay(1000000);
1138 + printf("\b\b\b\b\b\b\b");
1139 + printf("LED3 on");
1140 + *pPORTFIO |= PF8;
1141 + udelay(1000000);
1142 + printf("\b\b\b\b\b\b\b");
1143 + printf("LED4 on");
1144 + *pPORTFIO |= PF9;
1145 + udelay(1000000);
1146 + printf("\b\b\b\b\b\b\b");
1147 + printf("LED5 on");
1148 + *pPORTFIO |= PF10;
1149 + udelay(1000000);
1150 + printf("\b\b\b\b\b\b\b");
1151 + printf("lED6 on");
1152 + *pPORTFIO |= PF11;
1153 + printf("\b\b\b\b\b\b\b ");
1154 + return 0;
1155 +}
1156 +
1157 +/************************************************
1158 + * SW10 ---- PF5 SW11 ---- PF4 *
1159 + * SW12 ---- PF3 SW13 ---- PF2 *
1160 + ************************************************/
1161 +int button_post_test(int flags)
1162 +{
1163 + int i, delay = 5;
1164 + unsigned short value = 0;
1165 + int result = 0;
1166 +
1167 + *pPORTF_FER &= ~(PF5 | PF4 | PF3 | PF2);
1168 + *pPORTFIO_DIR &= ~(PF5 | PF4 | PF3 | PF2);
1169 + *pPORTFIO_INEN |= (PF5 | PF4 | PF3 | PF2);
1170 +
1171 + printf("\n--------Press SW10: %2d ", delay);
1172 + while (delay--) {
1173 + for (i = 0; i < 100; i++) {
1174 + value = *pPORTFIO & PF5;
1175 + if (value != 0) {
1176 + break;
1177 + }
1178 + udelay(10000);
1179 + }
1180 + printf("\b\b\b%2d ", delay);
1181 + }
1182 + if (value != 0)
1183 + printf("\b\bOK");
1184 + else {
1185 + result = -1;
1186 + printf("\b\bfailed");
1187 + }
1188 +
1189 + delay = 5;
1190 + printf("\n--------Press SW11: %2d ", delay);
1191 + while (delay--) {
1192 + for (i = 0; i < 100; i++) {
1193 + value = *pPORTFIO & PF4;
1194 + if (value != 0) {
1195 + break;
1196 + }
1197 + udelay(10000);
1198 + }
1199 + printf("\b\b\b%2d ", delay);
1200 + }
1201 + if (value != 0)
1202 + printf("\b\bOK");
1203 + else {
1204 + result = -1;
1205 + printf("\b\bfailed");
1206 + }
1207 +
1208 + delay = 5;
1209 + printf("\n--------Press SW12: %2d ", delay);
1210 + while (delay--) {
1211 + for (i = 0; i < 100; i++) {
1212 + value = *pPORTFIO & PF3;
1213 + if (value != 0) {
1214 + break;
1215 + }
1216 + udelay(10000);
1217 + }
1218 + printf("\b\b\b%2d ", delay);
1219 + }
1220 + if (value != 0)
1221 + printf("\b\bOK");
1222 + else {
1223 + result = -1;
1224 + printf("\b\bfailed");
1225 + }
1226 +
1227 + delay = 5;
1228 + printf("\n--------Press SW13: %2d ", delay);
1229 + while (delay--) {
1230 + for (i = 0; i < 100; i++) {
1231 + value = *pPORTFIO & PF2;
1232 + if (value != 0) {
1233 + break;
1234 + }
1235 + udelay(10000);
1236 + }
1237 + printf("\b\b\b%2d ", delay);
1238 + }
1239 + if (value != 0)
1240 + printf("\b\bOK");
1241 + else {
1242 + result = -1;
1243 + printf("\b\bfailed");
1244 + }
1245 + printf("\n");
1246 + return result;
1247 +}
1248 +#endif
1249 diff --git a/u-boot-1.1.6/board/IS4980/Makefile b/u-boot-1.1.6/board/IS4980/Makefile
1250 new file mode 100644
1251 index 0000000..4d03b2c
1252 --- /dev/null
1253 +++ b/u-boot-1.1.6/board/IS4980/Makefile
1254 @@ -0,0 +1,59 @@
1255 +#
1256 +# U-boot - Makefile
1257 +#
1258 +# Copyright (c) 2005-2007 Analog Device Inc.
1259 +#
1260 +# (C) Copyright 2000-2006
1261 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
1262 +#
1263 +# See file CREDITS for list of people who contributed to this
1264 +# project.
1265 +#
1266 +# This program is free software; you can redistribute it and/or
1267 +# modify it under the terms of the GNU General Public License as
1268 +# published by the Free Software Foundation; either version 2 of
1269 +# the License, or (at your option) any later version.
1270 +#
1271 +# This program is distributed in the hope that it will be useful,
1272 +# but WITHOUT ANY WARRANTY; without even the implied warranty of
1273 +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1274 +# GNU General Public License for more details.
1275 +#
1276 +# You should have received a copy of the GNU General Public License
1277 +# along with this program; if not, write to the Free Software
1278 +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
1279 +# MA 02111-1307 USA
1280 +#
1281 +
1282 +include $(TOPDIR)/config.mk
1283 +
1284 +LIB = $(obj)lib$(BOARD).a
1285 +
1286 +COBJS := $(BOARD).o post-memory.o spi_flash.o cmd_bf537led.o nand.o
1287 +#COBJS := $(BOARD).o post-memory.o stm_m25p64.o cmd_bf537led.o nand.o
1288 +
1289 +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
1290 +OBJS := $(addprefix $(obj),$(COBJS))
1291 +SOBJS := $(addprefix $(obj),$(SOBJS))
1292 +
1293 +$(LIB): $(obj).depend $(OBJS) $(SOBJS) u-boot.lds
1294 + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
1295 +
1296 +u-boot.lds: u-boot.lds.S
1297 + $(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P -Ubfin $^ > $@.tmp
1298 + mv -f $@.tmp $@
1299 +
1300 +clean:
1301 + rm -f $(SOBJS) $(OBJS)
1302 +
1303 +distclean: clean
1304 + rm -f $(LIB) core *.bak .depend
1305 +
1306 +#########################################################################
1307 +
1308 +# defines $(obj).depend target
1309 +include $(SRCTREE)/rules.mk
1310 +
1311 +sinclude $(obj).depend
1312 +
1313 +#########################################################################
1314 diff --git a/u-boot-1.1.6/board/Orbit3/Makefile b/u-boot-1.1.6/board/Orbit3/Makefile
1315 new file mode 100644
1316 index 0000000..4d03b2c
1317 --- /dev/null
1318 +++ b/u-boot-1.1.6/board/Orbit3/Makefile
1319 @@ -0,0 +1,59 @@
1320 +#
1321 +# U-boot - Makefile
1322 +#
1323 +# Copyright (c) 2005-2007 Analog Device Inc.
1324 +#
1325 +# (C) Copyright 2000-2006
1326 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
1327 +#
1328 +# See file CREDITS for list of people who contributed to this
1329 +# project.
1330 +#
1331 +# This program is free software; you can redistribute it and/or
1332 +# modify it under the terms of the GNU General Public License as
1333 +# published by the Free Software Foundation; either version 2 of
1334 +# the License, or (at your option) any later version.
1335 +#
1336 +# This program is distributed in the hope that it will be useful,
1337 +# but WITHOUT ANY WARRANTY; without even the implied warranty of
1338 +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1339 +# GNU General Public License for more details.
1340 +#
1341 +# You should have received a copy of the GNU General Public License
1342 +# along with this program; if not, write to the Free Software
1343 +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
1344 +# MA 02111-1307 USA
1345 +#
1346 +
1347 +include $(TOPDIR)/config.mk
1348 +
1349 +LIB = $(obj)lib$(BOARD).a
1350 +
1351 +COBJS := $(BOARD).o post-memory.o spi_flash.o cmd_bf537led.o nand.o
1352 +#COBJS := $(BOARD).o post-memory.o stm_m25p64.o cmd_bf537led.o nand.o
1353 +
1354 +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
1355 +OBJS := $(addprefix $(obj),$(COBJS))
1356 +SOBJS := $(addprefix $(obj),$(SOBJS))
1357 +
1358 +$(LIB): $(obj).depend $(OBJS) $(SOBJS) u-boot.lds
1359 + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
1360 +
1361 +u-boot.lds: u-boot.lds.S
1362 + $(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P -Ubfin $^ > $@.tmp
1363 + mv -f $@.tmp $@
1364 +
1365 +clean:
1366 + rm -f $(SOBJS) $(OBJS)
1367 +
1368 +distclean: clean
1369 + rm -f $(LIB) core *.bak .depend
1370 +
1371 +#########################################################################
1372 +
1373 +# defines $(obj).depend target
1374 +include $(SRCTREE)/rules.mk
1375 +
1376 +sinclude $(obj).depend
1377 +
1378 +#########################################################################
1379 diff --git a/u-boot-1.1.6/board/Orbit3/Orbit3.c b/u-boot-1.1.6/board/Orbit3/Orbit3.c
1380 new file mode 100644
1381 index 0000000..b40b20c
1382 --- /dev/null
1383 +++ b/u-boot-1.1.6/board/Orbit3/Orbit3.c
1384 @@ -0,0 +1,516 @@
1385 +/*
1386 + * U-boot - Orbit3.c
1387 + *
1388 + * Copyright (c) 2008 Metrologic Instruments Inc.
1389 + * Copyright (c) 2005-2007 Analog Devices Inc.
1390 + *
1391 + * (C) Copyright 2000-2004
1392 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
1393 + *
1394 + * See file CREDITS for list of people who contributed to this
1395 + * project.
1396 + *
1397 + * This program is free software; you can redistribute it and/or
1398 + * modify it under the terms of the GNU General Public License as
1399 + * published by the Free Software Foundation; either version 2 of
1400 + * the License, or (at your option) any later version.
1401 + *
1402 + * This program is distributed in the hope that it will be useful,
1403 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1404 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1405 + * GNU General Public License for more details.
1406 + *
1407 + * You should have received a copy of the GNU General Public License
1408 + * along with this program; if not, write to the Free Software
1409 + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
1410 + * MA 02110-1301 USA
1411 + */
1412 +
1413 +#include <common.h>
1414 +#include <config.h>
1415 +#include <command.h>
1416 +#include <asm/blackfin.h>
1417 +#include <asm/io.h>
1418 +#include <linux/etherdevice.h>
1419 +
1420 +#define POST_WORD_ADDR 0xFF903FFC
1421 +
1422 +int checkboard(void)
1423 +{
1424 + printf("Board: Metrologic Genesis Decode Board\n");
1425 + printf(" Support: http://www.metrologic.com/\n");
1426 + return 0;
1427 +}
1428 +
1429 +#if defined(CONFIG_BFIN_IDE)
1430 +
1431 +void cf_outb(unsigned char val, volatile unsigned char *addr)
1432 +{
1433 + *(addr) = val;
1434 + SSYNC();
1435 +}
1436 +
1437 +unsigned char cf_inb(volatile unsigned char *addr)
1438 +{
1439 + volatile unsigned char c;
1440 +
1441 + c = *(addr);
1442 + SSYNC();
1443 +
1444 + return c;
1445 +}
1446 +
1447 +void cf_insw(unsigned short *sect_buf, unsigned short *addr, int words)
1448 +{
1449 + int i;
1450 +
1451 + for (i = 0; i < words; i++)
1452 + *(sect_buf + i) = *(addr);
1453 + SSYNC();
1454 +}
1455 +
1456 +void cf_outsw(unsigned short *addr, unsigned short *sect_buf, int words)
1457 +{
1458 + int i;
1459 +
1460 + for (i = 0; i < words; i++)
1461 + *(addr) = *(sect_buf + i);
1462 + SSYNC();
1463 +}
1464 +#endif /* CONFIG_BFIN_IDE */
1465 +
1466 +long int initdram(int board_type)
1467 +{
1468 + DECLARE_GLOBAL_DATA_PTR;
1469 +#ifdef DEBUG
1470 + int brate;
1471 + char *tmp = getenv("baudrate");
1472 + brate = simple_strtoul(tmp, NULL, 16);
1473 + printf("Serial Port initialized with Baud rate = %x\n", brate);
1474 + printf("SDRAM attributes:\n");
1475 + printf("tRCD %d SCLK Cycles,tRP %d SCLK Cycles,tRAS %d SCLK Cycles"
1476 + "tWR %d SCLK Cycles,CAS Latency %d SCLK cycles \n",
1477 + 3, 3, 6, 2, 3);
1478 + printf("SDRAM Begin: 0x%x\n", CFG_SDRAM_BASE);
1479 + printf("Bank size = %d MB\n", CFG_MAX_RAM_SIZE >> 20);
1480 +#endif
1481 + gd->bd->bi_memstart = CFG_SDRAM_BASE;
1482 + gd->bd->bi_memsize = CFG_MAX_RAM_SIZE;
1483 + return CFG_MAX_RAM_SIZE;
1484 +}
1485 +
1486 +int board_get_enetaddr(uchar *mac_addr)
1487 +{
1488 +#ifdef CFG_NO_FLASH
1489 +# define USE_MAC_IN_FLASH 0
1490 +#else
1491 +# define USE_MAC_IN_FLASH 1
1492 +#endif
1493 + if (USE_MAC_IN_FLASH) {
1494 + /* we cram the MAC in the last flash sector */
1495 + uchar *board_mac_addr = (uchar *)0x203F0000;
1496 +
1497 + if (is_valid_ether_addr(board_mac_addr)) {
1498 + memcpy(mac_addr, board_mac_addr, 6);
1499 + return 0;
1500 + }
1501 + }
1502 +
1503 + puts("Warning: Generating 'random' MAC address\n");
1504 +
1505 + /* make something up */
1506 + const char s[] = __DATE__;
1507 + size_t i;
1508 + u32 cycles;
1509 + for (i = 0; i < 6; ++i) {
1510 + asm("%0 = CYCLES;" : "=r" (cycles));
1511 + mac_addr[i] = cycles ^ s[i];
1512 + }
1513 + mac_addr[0] = (mac_addr[0] | 0x02) & ~0x01; /* make it local unicast */
1514 + return 0;
1515 +}
1516 +
1517 +void board_reset(void)
1518 +{ /* FIXME: Alex Au: Don't know if we need to use this workaround... */
1519 + /* workaround for weak pull ups on ssel */
1520 + if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER) {
1521 + bfin_write_PORTF_FER(bfin_read_PORTF_FER() & ~PF10);
1522 + bfin_write_PORTFIO_SET(PF10);
1523 + udelay(1);
1524 + }
1525 +}
1526 +
1527 +
1528 +
1529 +#ifdef CONFIG_METROLOGIC_IO_INIT
1530 +
1531 +int metrologic_io_init(void)
1532 +{
1533 + /* Port F:
1534 +
1535 + 0 (out) <<< Host RS232 TX >>>
1536 + 1 (in) <<< Host RS232 RX >>>
1537 + 2 (out) <<< White LED (PWM) >>> [l]
1538 + 3 (Out) <<< Blue LED (PWM) >>> [l]
1539 + 4 (out) BEEP [l]
1540 + 5 (out) Target [l]
1541 + 6 (out) cam_sync [l]
1542 + 7 (out) Force On [l]
1543 + 8 (in) <<< PPI_VSYNC >>> [later, input]
1544 + 9 (in) <<< PPI_HSYNC >>> [later, input]
1545 + 10 (out) <<< SPI_CS >>>
1546 + 11 (out) <<< SPI_MOSI >>>
1547 + 12 (in) <<< SPI_MISO >>>
1548 + 13 (out) <<< SPI_CLOCK >>>
1549 + 14 (out) SPI_WP [h]
1550 + 15 (in) <<< PPI_Clock >>> [later, input]
1551 +
1552 + */
1553 +
1554 + *pPORTF_FER = PF0|PF1|PF10|PF11|PF12|PF13; /* PPI enabled in image device driver */
1555 + *pPORTFIO_DIR |= PF4|PF5|PF6|PF7|PF14;
1556 + *pPORTFIO_DIR &= ~(PF2|PF3|PF8|PF9|PF15);
1557 + *pPORTFIO_INEN &= ~(PF2|PF3|PF4|PF5|PF6|PF7|PF8|PF9|PF14|PF15);
1558 + *pPORTFIO &= ~(PF4|PF5|PF6|PF7);
1559 + *pPORTFIO |= PF14;
1560 +
1561 + /* Port G:
1562 +
1563 + 0 (in) <<< PPI_Data >>> [later, input]
1564 + 1 (in) <<< PPI_Data >>> [later, input]
1565 + 2 (in) <<< PPI_Data >>> [later, input]
1566 + 3 (in) <<< PPI_Data >>> [later, input]
1567 + 4 (in) <<< PPI_Data >>> [later, input]
1568 + 5 (in) <<< PPI_Data >>> [later, input]
1569 + 6 (in) <<< PPI_Data >>> [later, input]
1570 + 7 (in) <<< PPI_Data >>> [later, input]
1571 + *8 (out) DEC_KB_PASS_EN(N) [h]
1572 + 9 (out) HOSTRTS ( Leave as input / output high until polarity is known )
1573 + *10 (out) LED_HIGH_V [h] (video low, snap-shot high) / (USB high)
1574 + *11 (out) RESET IF (active H) [l]
1575 + 12 (out) LED Voltage Enable [h]
1576 + 13 (in) Spare ? Yellow LED ?
1577 + 14 (out) BUF_PC_DATA_COL [h]
1578 + 15 (in) IF_BUSY_LT_PEN_DATA
1579 +
1580 + */
1581 +
1582 + *pPORTG_FER = 0;
1583 + *pPORTGIO_DIR = PG8|PG9|PG10|PG11|PG12|PG14;
1584 + *pPORTGIO_INEN = PG15;
1585 + *pPORTGIO |= PG8|PG9|PG10|PG12|PG14;
1586 + *pPORTGIO &= ~(PG11);
1587 +
1588 + /* Port H:
1589 +
1590 + *0 (in) BUF_PC_DATA_COL
1591 + *1 (out) DEC_KB_CLOCK_BASE [l]*
1592 + *2 (out) DEC_KB_DATA_BASE [l]*
1593 + *3 (out) DEC_PC_CLOCK_BASE [l]*
1594 + *4 (out) DEC_PC_DATA_BASE [l]*
1595 + *5 (out) DEC_LT_PEN_BASE [l]*
1596 + 6 (in) IR_IN
1597 + *7 (out) DEC_REQ_UC [l]*
1598 + 8 (in) HOST CTS
1599 + 9 (in) BUTTON
1600 + *10 (in) BUF_SPI_REQ
1601 + *11 (in) BUF_EP_FULL_PAUSE
1602 + *12 (out) Ocillator En. (Active high) [h]
1603 + 13 (out) DC Mode (Active low) [h]
1604 + *14 (out) NEAR_SEL [l]
1605 + *15 (in) DEC_DTR_FULL
1606 +
1607 + */
1608 +
1609 + *pPORTH_FER = 0;
1610 + *pPORTHIO_DIR = PH1|PH2|PH3|PH4|PH5|PH7|PH12|PH13|PH14;
1611 + *pPORTHIO_INEN = ~(PH1|PH2|PH3|PH4|PH5|PH7|PH12|PH13|PH14);
1612 + *pPORTHIO |= PH12|PH13;
1613 + *pPORTHIO &= ~(PH1|PH2|PH3|PH4|PH5|PH7|PH14);
1614 +
1615 + __builtin_bfin_ssync();
1616 +
1617 +#if defined(DEBUG_METRO_IO)
1618 + printf("start Configure_Interface_IO()\r\n");
1619 +#endif
1620 + Configure_Interface_IO();
1621 +#if defined(DEBUG_METRO_IO)
1622 + printf("done Configure_Interface_IO()\r\n");
1623 +#endif
1624 +
1625 + return 0;
1626 +
1627 +}
1628 +
1629 +#endif /* CONFIG_METROLOGIC_IO_INIT */
1630 +#if defined(CONFIG_MISC_INIT_R)
1631 +/* miscellaneous platform dependent initialisations */
1632 +int misc_init_r(void)
1633 +{
1634 +#ifndef CFG_NO_FLASH
1635 + /* we use the last sector for the MAC address / POST DXE */
1636 + extern flash_info_t flash_info[];
1637 + flash_protect(FLAG_PROTECT_SET, 0x203F0000, 0x203FFFFF, &flash_info[0]);
1638 +#endif
1639 +
1640 +#if defined(CONFIG_BFIN_IDE)
1641 +#if defined(CONFIG_BFIN_TRUE_IDE)
1642 + /* Enable ATASEL when in True IDE mode */
1643 + printf("Using CF True IDE Mode\n");
1644 + cf_outb(0, (unsigned char *)CONFIG_CF_ATASEL_ENA);
1645 + udelay(1000);
1646 +#elif defined(CONFIG_BFIN_CF_IDE)
1647 + /* Disable ATASEL when we're in Common Memory Mode */
1648 + printf("Using CF Common Memory Mode\n");
1649 + cf_outb(0, (unsigned char *)CONFIG_CF_ATASEL_DIS);
1650 + udelay(1000);
1651 +#elif defined(CONFIG_BFIN_HDD_IDE)
1652 + printf("Using HDD IDE Mode\n");
1653 +#endif
1654 + ide_init();
1655 +#endif /* CONFIG_BFIN_IDE */
1656 + return 0;
1657 +}
1658 +#endif /* CONFIG_MISC_INIT_R */
1659 +
1660 +#ifdef CONFIG_POST
1661 +#if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_BYPASS)
1662 +/* Using sw10-PF5 as the hotkey */
1663 +int post_hotkeys_pressed(void)
1664 +{
1665 + return 0;
1666 +}
1667 +#else
1668 +/* Using sw10-PF5 as the hotkey */
1669 +int post_hotkeys_pressed(void)
1670 +{
1671 + int delay = 3;
1672 + int i;
1673 + unsigned short value;
1674 +
1675 + *pPORTF_FER &= ~PF5;
1676 + *pPORTFIO_DIR &= ~PF5;
1677 + *pPORTFIO_INEN |= PF5;
1678 +
1679 + printf("########Press SW10 to enter Memory POST########: %2d ", delay);
1680 + while (delay--) {
1681 + for (i = 0; i < 100; i++) {
1682 + value = *pPORTFIO & PF5;
1683 + if (value != 0) {
1684 + break;
1685 + }
1686 + udelay(10000);
1687 + }
1688 + printf("\b\b\b%2d ", delay);
1689 + }
1690 + printf("\b\b\b 0");
1691 + printf("\n");
1692 + if (value == 0)
1693 + return 0;
1694 + else {
1695 + printf("Hotkey has been pressed, Enter POST . . . . . .\n");
1696 + return 1;
1697 + }
1698 +}
1699 +#endif
1700 +#endif
1701 +
1702 +#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
1703 +void post_word_store(ulong a)
1704 +{
1705 + volatile ulong *save_addr = (volatile ulong *)POST_WORD_ADDR;
1706 + *save_addr = a;
1707 +}
1708 +
1709 +ulong post_word_load(void)
1710 +{
1711 + volatile ulong *save_addr = (volatile ulong *)POST_WORD_ADDR;
1712 + return *save_addr;
1713 +}
1714 +#endif
1715 +
1716 +#ifdef CONFIG_POST
1717 +int uart_post_test(int flags)
1718 +{
1719 + return 0;
1720 +}
1721 +
1722 +#define BLOCK_SIZE 0x10000
1723 +#define VERIFY_ADDR 0x2000000
1724 +extern int erase_block_flash(int);
1725 +extern int write_data(long lStart, long lCount, uchar * pnData);
1726 +int flash_post_test(int flags)
1727 +{
1728 + unsigned short *pbuf, *temp;
1729 + int offset, n, i;
1730 + int value = 0;
1731 + int result = 0;
1732 + printf("\n");
1733 + pbuf = (unsigned short *)VERIFY_ADDR;
1734 + temp = pbuf;
1735 + for (n = FLASH_START_POST_BLOCK; n < FLASH_END_POST_BLOCK; n++) {
1736 + offset = (n - 7) * BLOCK_SIZE;
1737 + printf("--------Erase block:%2d..", n);
1738 + erase_block_flash(n);
1739 + printf("OK\r");
1740 + printf("--------Program block:%2d...", n);
1741 + write_data(CFG_FLASH_BASE + offset, BLOCK_SIZE, pbuf);
1742 + printf("OK\r");
1743 + printf("--------Verify block:%2d...", n);
1744 + for (i = 0; i < BLOCK_SIZE; i += 2) {
1745 + if (*(unsigned short *)(CFG_FLASH_BASE + offset + i) !=
1746 + *temp++) {
1747 + value = 1;
1748 + result = 1;
1749 + }
1750 + }
1751 + if (value)
1752 + printf("failed\n");
1753 + else
1754 + printf("OK %3d%%\r",
1755 + (int)(
1756 + (n + 1 -
1757 + FLASH_START_POST_BLOCK) *
1758 + 100 / (FLASH_END_POST_BLOCK -
1759 + FLASH_START_POST_BLOCK)));
1760 +
1761 + temp = pbuf;
1762 + value = 0;
1763 + }
1764 + printf("\n");
1765 + if (result)
1766 + return -1;
1767 + else
1768 + return 0;
1769 +}
1770 +
1771 +/****************************************************
1772 + * LED1 ---- PF6 LED2 ---- PF7 *
1773 + * LED3 ---- PF8 LED4 ---- PF9 *
1774 + * LED5 ---- PF10 LED6 ---- PF11 *
1775 + ****************************************************/
1776 +int led_post_test(int flags)
1777 +{
1778 + *pPORTF_FER &= ~(PF6 | PF7 | PF8 | PF9 | PF10 | PF11);
1779 + *pPORTFIO_DIR |= PF6 | PF7 | PF8 | PF9 | PF10 | PF11;
1780 + *pPORTFIO_INEN &= ~(PF6 | PF7 | PF8 | PF9 | PF10 | PF11);
1781 + *pPORTFIO &= ~(PF6 | PF7 | PF8 | PF9 | PF10 | PF11);
1782 + udelay(1000000);
1783 + printf("LED1 on");
1784 + *pPORTFIO |= PF6;
1785 + udelay(1000000);
1786 + printf("\b\b\b\b\b\b\b");
1787 + printf("LED2 on");
1788 + *pPORTFIO |= PF7;
1789 + udelay(1000000);
1790 + printf("\b\b\b\b\b\b\b");
1791 + printf("LED3 on");
1792 + *pPORTFIO |= PF8;
1793 + udelay(1000000);
1794 + printf("\b\b\b\b\b\b\b");
1795 + printf("LED4 on");
1796 + *pPORTFIO |= PF9;
1797 + udelay(1000000);
1798 + printf("\b\b\b\b\b\b\b");
1799 + printf("LED5 on");
1800 + *pPORTFIO |= PF10;
1801 + udelay(1000000);
1802 + printf("\b\b\b\b\b\b\b");
1803 + printf("lED6 on");
1804 + *pPORTFIO |= PF11;
1805 + printf("\b\b\b\b\b\b\b ");
1806 + return 0;
1807 +}
1808 +
1809 +/************************************************
1810 + * SW10 ---- PF5 SW11 ---- PF4 *
1811 + * SW12 ---- PF3 SW13 ---- PF2 *
1812 + ************************************************/
1813 +int button_post_test(int flags)
1814 +{
1815 + int i, delay = 5;
1816 + unsigned short value = 0;
1817 + int result = 0;
1818 +
1819 + *pPORTF_FER &= ~(PF5 | PF4 | PF3 | PF2);
1820 + *pPORTFIO_DIR &= ~(PF5 | PF4 | PF3 | PF2);
1821 + *pPORTFIO_INEN |= (PF5 | PF4 | PF3 | PF2);
1822 +
1823 + printf("\n--------Press SW10: %2d ", delay);
1824 + while (delay--) {
1825 + for (i = 0; i < 100; i++) {
1826 + value = *pPORTFIO & PF5;
1827 + if (value != 0) {
1828 + break;
1829 + }
1830 + udelay(10000);
1831 + }
1832 + printf("\b\b\b%2d ", delay);
1833 + }
1834 + if (value != 0)
1835 + printf("\b\bOK");
1836 + else {
1837 + result = -1;
1838 + printf("\b\bfailed");
1839 + }
1840 +
1841 + delay = 5;
1842 + printf("\n--------Press SW11: %2d ", delay);
1843 + while (delay--) {
1844 + for (i = 0; i < 100; i++) {
1845 + value = *pPORTFIO & PF4;
1846 + if (value != 0) {
1847 + break;
1848 + }
1849 + udelay(10000);
1850 + }
1851 + printf("\b\b\b%2d ", delay);
1852 + }
1853 + if (value != 0)
1854 + printf("\b\bOK");
1855 + else {
1856 + result = -1;
1857 + printf("\b\bfailed");
1858 + }
1859 +
1860 + delay = 5;
1861 + printf("\n--------Press SW12: %2d ", delay);
1862 + while (delay--) {
1863 + for (i = 0; i < 100; i++) {
1864 + value = *pPORTFIO & PF3;
1865 + if (value != 0) {
1866 + break;
1867 + }
1868 + udelay(10000);
1869 + }
1870 + printf("\b\b\b%2d ", delay);
1871 + }
1872 + if (value != 0)
1873 + printf("\b\bOK");
1874 + else {
1875 + result = -1;
1876 + printf("\b\bfailed");
1877 + }
1878 +
1879 + delay = 5;
1880 + printf("\n--------Press SW13: %2d ", delay);
1881 + while (delay--) {
1882 + for (i = 0; i < 100; i++) {
1883 + value = *pPORTFIO & PF2;
1884 + if (value != 0) {
1885 + break;
1886 + }
1887 + udelay(10000);
1888 + }
1889 + printf("\b\b\b%2d ", delay);
1890 + }
1891 + if (value != 0)
1892 + printf("\b\bOK");
1893 + else {
1894 + result = -1;
1895 + printf("\b\bfailed");
1896 + }
1897 + printf("\n");
1898 + return result;
1899 +}
1900 +#endif
1901 diff --git a/u-boot-1.1.6/board/VuQuest2D/Makefile b/u-boot-1.1.6/board/VuQuest2D/Makefile
1902 new file mode 100644
1903 index 0000000..1a924d9
1904 --- /dev/null
1905 +++ b/u-boot-1.1.6/board/VuQuest2D/Makefile
1906 @@ -0,0 +1,59 @@
1907 +#
1908 +# U-boot - Makefile
1909 +#
1910 +# Copyright (c) 2005-2008 Analog Device Inc.
1911 +#
1912 +# (C) Copyright 2000-2006
1913 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
1914 +#
1915 +# See file CREDITS for list of people who contributed to this
1916 +# project.
1917 +#
1918 +# This program is free software; you can redistribute it and/or
1919 +# modify it under the terms of the GNU General Public License as
1920 +# published by the Free Software Foundation; either version 2 of
1921 +# the License, or (at your option) any later version.
1922 +#
1923 +# This program is distributed in the hope that it will be useful,
1924 +# but WITHOUT ANY WARRANTY; without even the implied warranty of
1925 +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1926 +# GNU General Public License for more details.
1927 +#
1928 +# You should have received a copy of the GNU General Public License
1929 +# along with this program; if not, write to the Free Software
1930 +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
1931 +# MA 02111-1307 USA
1932 +#
1933 +
1934 +include $(TOPDIR)/config.mk
1935 +
1936 +LIB = $(obj)lib$(BOARD).a
1937 +
1938 +#COBJS := $(BOARD).o spi_flash.o video.o
1939 +COBJS := $(BOARD).o spi.o video.o
1940 +
1941 +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
1942 +OBJS := $(addprefix $(obj),$(COBJS))
1943 +SOBJS := $(addprefix $(obj),$(SOBJS))
1944 +
1945 +$(LIB): $(obj).depend $(OBJS) $(SOBJS) u-boot.lds
1946 + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
1947 +
1948 +u-boot.lds: u-boot.lds.S
1949 + $(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P -Ubfin $^ > $@.tmp
1950 + mv -f $@.tmp $@
1951 +
1952 +clean:
1953 + rm -f $(SOBJS) $(OBJS)
1954 +
1955 +distclean: clean
1956 + rm -f $(LIB) core *.bak .depend
1957 +
1958 +#########################################################################
1959 +
1960 +# defines $(obj).depend target
1961 +include $(SRCTREE)/rules.mk
1962 +
1963 +sinclude $(obj).depend
1964 +
1965 +#########################################################################
1966 diff --git a/u-boot-1.1.6/board/VuQuest2D/VuQuest2D.c b/u-boot-1.1.6/board/VuQuest2D/VuQuest2D.c
1967 new file mode 100644
1968 index 0000000..04647d7
1969 --- /dev/null
1970 +++ b/u-boot-1.1.6/board/VuQuest2D/VuQuest2D.c
1971 @@ -0,0 +1,418 @@
1972 +/*
1973 + * U-boot - stamp.c STAMP board specific routines
1974 + *
1975 + * Copyright (c) 2005-2007 Analog Devices Inc.
1976 + *
1977 + * (C) Copyright 2000-2004
1978 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
1979 + *
1980 + * See file CREDITS for list of people who contributed to this
1981 + * project.
1982 + *
1983 + * This program is free software; you can redistribute it and/or
1984 + * modify it under the terms of the GNU General Public License as
1985 + * published by the Free Software Foundation; either version 2 of
1986 + * the License, or (at your option) any later version.
1987 + *
1988 + * This program is distributed in the hope that it will be useful,
1989 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1990 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1991 + * GNU General Public License for more details.
1992 + *
1993 + * You should have received a copy of the GNU General Public License
1994 + * along with this program; if not, write to the Free Software
1995 + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
1996 + * MA 02110-1301 USA
1997 + */
1998 +
1999 +#include <common.h>
2000 +#include <asm/blackfin.h>
2001 +#include <asm/io.h>
2002 +#include <asm/mach-common/bits/ebiu.h>
2003 +#include "VuQuest2D.h"
2004 +#include "Metrologic_Hardware.h"
2005 +
2006 +#define STATUS_LED_OFF 0
2007 +#define STATUS_LED_ON 1
2008 +
2009 +#ifdef CONFIG_SHOW_BOOT_PROGRESS
2010 +# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
2011 +#else
2012 +# define SHOW_BOOT_PROGRESS(arg)
2013 +#endif
2014 +
2015 +#ifdef CONFIG_METROLOGIC_IO_INIT
2016 +void set_VQ_default_io(void);
2017 +#endif
2018 +
2019 +extern void Configure_Interface_IO(void);
2020 +extern void Configure_RTS_Pin(void);
2021 +extern int get_pfx_level(int pf_num);
2022 +
2023 +#if (CONFIG_METROLOGIC_VQ2D_REV > 1)
2024 +
2025 +int
2026 +Read_VQ_AtoD(void)
2027 +{
2028 +#define VQ2D_RTS_PIN 6
2029 + int fio_dir = *pFIO_DIR;
2030 + int fio_ilen = *pFIO_INEN;
2031 + int pf6_level;
2032 +
2033 + *pFIO_DIR &= ~(PF6);
2034 + *pFIO_INEN |= PF6;
2035 +
2036 + pf6_level = get_pfx_level(VQ2D_RTS_PIN);
2037 +
2038 + *pFIO_DIR = fio_dir;
2039 + *pFIO_INEN = fio_ilen;
2040 +
2041 + if (pf6_level == 0)
2042 + { /* RS232 */
2043 + return (241 + 255) / 2;
2044 + }
2045 + else
2046 + { /* USB */
2047 + return (113 + 127) / 2;
2048 + }
2049 +}
2050 +
2051 +void
2052 +Configure_VQ2D_Interface_IO(int interface_board)
2053 +{
2054 + if (interface_board == RS232_BOARD)
2055 + {
2056 +#define PWR_DWN_PIN 9
2057 +#define PWR_ON_PIN 5
2058 + Configure_RTS_Pin();
2059 +
2060 + *pFIO_DIR |= PF9;
2061 + *pFIO_INEN &= ~PF9;
2062 + *pFIO_FLAG_D |= PF5;
2063 + *pFIO_FLAG_D &= ~PF9; /* PWR_DWN will be turned off at img.ko */
2064 + }
2065 + else
2066 + { /* USB board */
2067 +#define SLAVE_BUSY_PIN 9
2068 +
2069 + *pFIO_DIR &= ~(PF9);
2070 + }
2071 +
2072 + /* power down pin handled by silabs */
2073 +}
2074 +
2075 +#endif /* #if (CONFIG_METROLOGIC_VQ2D_REV > 1) */
2076 +
2077 +int checkboard(void)
2078 +{
2079 + printf("CPU: ADSP BF531 Rev.: 0.%d\n", *pCHIPID >> 28);
2080 + printf("Board: Metrologic VuQuest2D decode board\n");
2081 + printf(" Support: http://www.metrologic.com/\n");
2082 + return 0;
2083 +}
2084 +
2085 +long int initdram(int board_type)
2086 +{
2087 + DECLARE_GLOBAL_DATA_PTR;
2088 +#ifdef DEBUG
2089 + printf("SDRAM attributes:\n");
2090 + printf
2091 + (" tRCD:%d Cycles; tRP:%d Cycles; tRAS:%d Cycles; tWR:%d Cycles; "
2092 + "CAS Latency:%d cycles\n", (SDRAM_tRCD >> 15), (SDRAM_tRP >> 11),
2093 + (SDRAM_tRAS >> 6), (SDRAM_tWR >> 19), (SDRAM_CL >> 2));
2094 + printf("SDRAM Begin: 0x%x\n", CFG_SDRAM_BASE);
2095 + printf("Bank size = %d MB\n", 128);
2096 +#endif
2097 + gd->bd->bi_memstart = CFG_SDRAM_BASE;
2098 + gd->bd->bi_memsize = CFG_MAX_RAM_SIZE;
2099 + return (gd->bd->bi_memsize);
2100 +}
2101 +
2102 +void swap_to(int device_id)
2103 +{
2104 +#ifdef CONFIG_METROLOGIC_IO_INIT
2105 + if (device_id == FLASH)
2106 + {
2107 + bfin_write_FIO_DIR(bfin_read_FIO_DIR() | PF2);
2108 + SSYNC();
2109 + bfin_write_FIO_FLAG_S(PF2);
2110 + SSYNC();
2111 + }
2112 +#else
2113 + bfin_write_FIO_DIR(bfin_read_FIO_DIR() | PF1 | PF0);
2114 + SSYNC();
2115 + bfin_write_FIO_FLAG_C(PF1);
2116 + if (device_id == ETHERNET)
2117 + bfin_write_FIO_FLAG_S(PF0);
2118 + else if (device_id == FLASH)
2119 + bfin_write_FIO_FLAG_C(PF0);
2120 + else
2121 + printf("Unknown device to switch\n");
2122 + SSYNC();
2123 +#endif
2124 +}
2125 +
2126 +#if defined(CONFIG_MISC_INIT_R)
2127 +/* miscellaneous platform dependent initialisations */
2128 +int misc_init_r(void)
2129 +{
2130 + int i;
2131 + int cf_stat = 0;
2132 +
2133 + /* Check whether CF card is inserted */
2134 + *pFIO_EDGE = FIO_EDGE_CF_BITS;
2135 + *pFIO_POLAR = FIO_POLAR_CF_BITS;
2136 + for (i = 0; i < 0x300; i++)
2137 + asm("nop;");
2138 +
2139 + if ((*pFIO_FLAG_S) & CF_STAT_BITS) {
2140 + cf_stat = 0;
2141 + } else {
2142 + cf_stat = 1;
2143 + }
2144 +
2145 + *pFIO_EDGE = FIO_EDGE_BITS;
2146 + *pFIO_POLAR = FIO_POLAR_BITS;
2147 +
2148 + if (cf_stat) {
2149 + printf("Booting from COMPACT flash\n");
2150 +
2151 + for (i = 0; i < 0x1000; i++)
2152 + asm("nop;");
2153 + for (i = 0; i < 0x1000; i++)
2154 + asm("nop;");
2155 + for (i = 0; i < 0x1000; i++)
2156 + asm("nop;");
2157 +
2158 + serial_setbrg();
2159 + ide_init();
2160 +
2161 + setenv("bootargs", "");
2162 + setenv("bootcmd",
2163 + "fatload ide 0:1 0x1000000 uImage-stamp;bootm 0x1000000;bootm 0x20100000");
2164 + } else {
2165 + printf("Booting from FLASH\n");
2166 + }
2167 + return 0;
2168 +}
2169 +#endif
2170 +
2171 +#ifdef CONFIG_STAMP_CF
2172 +
2173 +void cf_outb(unsigned char val, volatile unsigned char *addr)
2174 +{
2175 + /*
2176 + * Set PF1 PF0 respectively to 0 1 to divert address
2177 + * to the expansion memory banks
2178 + */
2179 + *pFIO_FLAG_S = CF_PF0;
2180 + *pFIO_FLAG_C = CF_PF1;
2181 + SSYNC();
2182 +
2183 + *(addr) = val;
2184 + SSYNC();
2185 +
2186 + /* Setback PF1 PF0 to 0 0 to address external
2187 + * memory banks */
2188 + *(volatile unsigned short *)pFIO_FLAG_C = CF_PF1_PF0;
2189 + SSYNC();
2190 +}
2191 +
2192 +unsigned char cf_inb(volatile unsigned char *addr)
2193 +{
2194 + volatile unsigned char c;
2195 +
2196 + *pFIO_FLAG_S = CF_PF0;
2197 + *pFIO_FLAG_C = CF_PF1;
2198 + SSYNC();
2199 +
2200 + c = *(addr);
2201 + SSYNC();
2202 +
2203 + *pFIO_FLAG_C = CF_PF1_PF0;
2204 + SSYNC();
2205 +
2206 + return c;
2207 +}
2208 +
2209 +void cf_insw(unsigned short *sect_buf, unsigned short *addr, int words)
2210 +{
2211 + int i;
2212 +
2213 + *pFIO_FLAG_S = CF_PF0;
2214 + *pFIO_FLAG_C = CF_PF1;
2215 + SSYNC();
2216 +
2217 + for (i = 0; i < words; i++) {
2218 + *(sect_buf + i) = *(addr);
2219 + SSYNC();
2220 + }
2221 +
2222 + *pFIO_FLAG_C = CF_PF1_PF0;
2223 + SSYNC();
2224 +}
2225 +
2226 +void cf_outsw(unsigned short *addr, unsigned short *sect_buf, int words)
2227 +{
2228 + int i;
2229 +
2230 + *pFIO_FLAG_S = CF_PF0;
2231 + *pFIO_FLAG_C = CF_PF1;
2232 + SSYNC();
2233 +
2234 + for (i = 0; i < words; i++) {
2235 + *(addr) = *(sect_buf + i);
2236 + SSYNC();
2237 + }
2238 +
2239 + *pFIO_FLAG_C = CF_PF1_PF0;
2240 + SSYNC();
2241 +}
2242 +#endif
2243 +
2244 +#ifdef CONFIG_METROLOGIC_IO_INIT
2245 +
2246 +void set_VQ_default_io(void)
2247 +{
2248 + /* Port F:
2249 + 0 - (Out?) I2C Clock
2250 + 1 - (In?) I2C Data
2251 + 2 - (Out) SPI chip select
2252 + 3 - (In?) nWake / PPI_FS3
2253 + 4 - (Out) Target Pin
2254 + 5 - (Out) nGoodRead
2255 + 6 - (Out) RTS
2256 + 7 - (In) CTS
2257 + 8 - (Out) Minflash / IllumOn
2258 + 9 - (Out?) nPowerDown (RS232) / (In) Slave_Busy (USB)
2259 + 10 - (Out) CamSync
2260 + 11 - (In) nTrigger (Input to decode)
2261 +
2262 + 12 - (In) PPI Data
2263 + 13 - (In) PPI Data
2264 + 14 - (In) PPI Data
2265 + 15 - (In) PPI Data
2266 +
2267 + */
2268 +
2269 +
2270 +
2271 +
2272 +
2273 +#if (CONFIG_METROLOGIC_VQ2D_REV > 1)
2274 + *pFIO_DIR |= PF0|PF1|PF2|PF4|PF5|PF8|PF10;
2275 + *pFIO_DIR &= ~(PF3 | PF6|PF9 | PF12|PF13|PF14|PF15);
2276 +#else
2277 + *pFIO_DIR |= PF0|PF1|PF2|PF4|PF5|PF8|PF9|PF10;
2278 + *pFIO_DIR &= ~(PF3 | PF12|PF13|PF14|PF15);
2279 +#endif
2280 +
2281 + *pFIO_EDGE = 0;
2282 +
2283 +
2284 +
2285 +#if (CONFIG_METROLOGIC_VQ2D_REV > 1)
2286 + *pFIO_INEN &= ~(PF0|PF1|PF2 | PF4|PF5|PF8|PF10 | PF12|PF13|PF14|PF15);
2287 + *pFIO_INEN |= PF3 | PF6 | PF7 | PF9 | PF11;
2288 +#else
2289 + *pFIO_INEN &= ~(PF0|PF1|PF2 | PF4|PF5|PF6|PF8|PF9|PF10);
2290 + *pFIO_INEN |= PF3 | PF7 | PF11;
2291 +#endif
2292 +
2293 +
2294 +
2295 +
2296 +
2297 +
2298 +
2299 +
2300 +
2301 +
2302 + *pFIO_POLAR = 0;
2303 + *pFIO_FLAG_D &= ~(PF0|PF1 | PF4|PF8|PF10);
2304 +#if (CONFIG_METROLOGIC_VQ2D_REV > 1)
2305 + *pFIO_FLAG_D |= PF2;
2306 + *pFIO_FLAG_D &= ~PF5;
2307 +#else
2308 + *pFIO_FLAG_D |= PF2|PF5|PF9;
2309 +#endif
2310 +
2311 +
2312 + __builtin_bfin_ssync();
2313 +}
2314 +
2315 +int metrologic_io_init(void)
2316 +{
2317 + set_VQ_default_io();
2318 +
2319 + Configure_Interface_IO();
2320 +
2321 +
2322 +
2323 + return 0;
2324 +
2325 +
2326 +
2327 +}
2328 +
2329 +#endif /* CONFIG_METROLOGIC_IO_INIT */
2330 +
2331 +void stamp_led_set(int LED1, int LED2, int LED3)
2332 +{
2333 +#ifndef CONFIG_METROLOGIC_IO_INIT
2334 + *pFIO_INEN &= ~(PF2 | PF3 | PF4);
2335 + *pFIO_DIR |= (PF2 | PF3 | PF4);
2336 +
2337 + if (LED1 == STATUS_LED_OFF)
2338 + *pFIO_FLAG_S = PF2;
2339 + else
2340 + *pFIO_FLAG_C = PF2;
2341 + if (LED2 == STATUS_LED_OFF)
2342 + *pFIO_FLAG_S = PF3;
2343 + else
2344 + *pFIO_FLAG_C = PF3;
2345 + if (LED3 == STATUS_LED_OFF)
2346 + *pFIO_FLAG_S = PF4;
2347 + else
2348 + *pFIO_FLAG_C = PF4;
2349 + SSYNC();
2350 +#endif
2351 +}
2352 +
2353 +void show_boot_progress(int status)
2354 +{
2355 + switch (status) {
2356 + case 1:
2357 + stamp_led_set(STATUS_LED_OFF, STATUS_LED_OFF, STATUS_LED_ON);
2358 + break;
2359 + case 2:
2360 + stamp_led_set(STATUS_LED_OFF, STATUS_LED_ON, STATUS_LED_OFF);
2361 + break;
2362 + case 3:
2363 + stamp_led_set(STATUS_LED_OFF, STATUS_LED_ON, STATUS_LED_ON);
2364 + break;
2365 + case 4:
2366 + stamp_led_set(STATUS_LED_ON, STATUS_LED_OFF, STATUS_LED_OFF);
2367 + break;
2368 + case 5:
2369 + case 6:
2370 + stamp_led_set(STATUS_LED_ON, STATUS_LED_OFF, STATUS_LED_ON);
2371 + break;
2372 + case 7:
2373 + case 8:
2374 + stamp_led_set(STATUS_LED_ON, STATUS_LED_ON, STATUS_LED_OFF);
2375 + break;
2376 + case 9:
2377 + case 10:
2378 + case 11:
2379 + case 12:
2380 + case 13:
2381 + case 14:
2382 + case 15:
2383 + stamp_led_set(STATUS_LED_OFF, STATUS_LED_OFF, STATUS_LED_OFF);
2384 + break;
2385 + default:
2386 + stamp_led_set(STATUS_LED_ON, STATUS_LED_ON, STATUS_LED_ON);
2387 + break;
2388 + }
2389 +}
2390 diff --git a/u-boot-1.1.6/board/VuQuest2D/VuQuest2D.h b/u-boot-1.1.6/board/VuQuest2D/VuQuest2D.h
2391 new file mode 100644
2392 index 0000000..96f7aa7
2393 --- /dev/null
2394 +++ b/u-boot-1.1.6/board/VuQuest2D/VuQuest2D.h
2395 @@ -0,0 +1,53 @@
2396 +/*
2397 + * U-boot - stamp.h
2398 + *
2399 + * Copyright (c) 2005-2007 Analog Devices Inc.
2400 + *
2401 + * (C) Copyright 2000-2004
2402 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
2403 + *
2404 + * See file CREDITS for list of people who contributed to this
2405 + * project.
2406 + *
2407 + * This program is free software; you can redistribute it and/or
2408 + * modify it under the terms of the GNU General Public License as
2409 + * published by the Free Software Foundation; either version 2 of
2410 + * the License, or (at your option) any later version.
2411 + *
2412 + * This program is distributed in the hope that it will be useful,
2413 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
2414 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2415 + * GNU General Public License for more details.
2416 + *
2417 + * You should have received a copy of the GNU General Public License
2418 + * along with this program; if not, write to the Free Software
2419 + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
2420 + * MA 02110-1301 USA
2421 + */
2422 +
2423 +#ifndef __VUQUEST2D_H__
2424 +#define __VUQUEST2D_H__
2425 +
2426 +extern void init_Flags(void);
2427 +
2428 +extern volatile unsigned long *ambctl0;
2429 +extern volatile unsigned long *ambctl1;
2430 +extern volatile unsigned long *amgctl;
2431 +
2432 +/* Definitions used in Compact Flash Boot support */
2433 +#define FIO_EDGE_CF_BITS 0x0000
2434 +#define FIO_POLAR_CF_BITS 0x0000
2435 +#define FIO_EDGE_BITS 0x1E0
2436 +#define FIO_POLAR_BITS 0x160
2437 +
2438 +/* Compact flash status bits in status register */
2439 +#define CF_STAT_BITS 0x00000060
2440 +
2441 +/* CF Flags used to switch between expansion and external
2442 + * memory banks
2443 + */
2444 +#define CF_PF0 0x0001
2445 +#define CF_PF1 0x0002
2446 +#define CF_PF1_PF0 0x0003
2447 +
2448 +#endif
2449 diff --git a/u-boot-1.1.6/board/VuQuest2D/config.mk b/u-boot-1.1.6/board/VuQuest2D/config.mk
2450 new file mode 100644
2451 index 0000000..2afee57
2452 --- /dev/null
2453 +++ b/u-boot-1.1.6/board/VuQuest2D/config.mk
2454 @@ -0,0 +1,15 @@
2455 +#
2456 +# Copyright (c) 2005-2008 Analog Device Inc.
2457 +#
2458 +# (C) Copyright 2001
2459 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
2460 +#
2461 +# Licensed under the GPL-2 or later.
2462 +#
2463 +
2464 +# This is not actually used for Blackfin boards so do not change it
2465 +#TEXT_BASE = do-not-use-me
2466 +
2467 +# Set some default LDR flags based on boot mode.
2468 +LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8
2469 +LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))
2470 diff --git a/u-boot-1.1.6/board/VuQuest2D/spi.c b/u-boot-1.1.6/board/VuQuest2D/spi.c
2471 new file mode 100644
2472 index 0000000..908d4e1
2473 --- /dev/null
2474 +++ b/u-boot-1.1.6/board/VuQuest2D/spi.c
2475 @@ -0,0 +1,533 @@
2476 +/****************************************************************************
2477 + * SPI flash driver for M25P64
2478 + ****************************************************************************/
2479 +#include <common.h>
2480 +#include <linux/ctype.h>
2481 +#include <asm/mach-common/bits/spi.h>
2482 +
2483 +#if defined(CONFIG_SPI)
2484 +
2485 +//Application definitions
2486 +
2487 +#define NUM_SECTORS 128 /* number of sectors */
2488 +#define SECTOR_SIZE 0x10000
2489 +#define NOP_NUM 1000
2490 +
2491 +#define COMMON_SPI_SETTINGS (SPE|MSTR|CPHA|CPOL) //Settings to the SPI_CTL
2492 +#define TIMOD01 (0x01) //stes the SPI to work with core instructions
2493 +
2494 +//Flash commands
2495 +#define SPI_WREN (0x06) //Set Write Enable Latch
2496 +#define SPI_WRDI (0x04) //Reset Write Enable Latch
2497 +#define SPI_RDSR (0x05) //Read Status Register
2498 +#define SPI_WRSR (0x01) //Write Status Register
2499 +#define SPI_READ (0x03) //Read data from memory
2500 +#define SPI_FAST_READ (0x0B) //Read data from memory
2501 +#define SPI_PP (0x02) //Program Data into memory
2502 +#define SPI_SE (0xD8) //Erase one sector in memory
2503 +#define SPI_BE (0xC7) //Erase all memory
2504 +#define WIP (0x1) //Check the write in progress bit of the SPI status register
2505 +#define WEL (0x2) //Check the write enable bit of the SPI status register
2506 +
2507 +#define TIMEOUT 350000000
2508 +
2509 +typedef enum
2510 +{
2511 + NO_ERR,
2512 + POLL_TIMEOUT,
2513 + INVALID_SECTOR,
2514 + INVALID_BLOCK,
2515 +}ERROR_CODE;
2516 +
2517 +
2518 +void spi_init_f (void);
2519 +void spi_init_r (void);
2520 +ssize_t spi_read (uchar *, int, uchar *, int);
2521 +ssize_t spi_write (uchar *, int, uchar *, int);
2522 +
2523 +char ReadStatusRegister(void);
2524 +void Wait_For_SPIF(void);
2525 +void SetupSPI( const int spi_setting );
2526 +void SPI_OFF(void);
2527 +void SendSingleCommand( const int iCommand );
2528 +
2529 +ERROR_CODE GetSectorNumber( unsigned long ulOffset, int *pnSector );
2530 +ERROR_CODE EraseBlock( int nBlock );
2531 +ERROR_CODE ReadData( unsigned long ulStart, long lCount,int *pnData );
2532 +ERROR_CODE WriteData( unsigned long ulStart, long lCount, int *pnData );
2533 +ERROR_CODE Wait_For_Status( char Statusbit );
2534 +ERROR_CODE Wait_For_WEL(void);
2535 +
2536 +/* -------------------
2537 + * Variables
2538 + * ------------------- */
2539 +
2540 +/* **************************************************************************
2541 + *
2542 + * Function: spi_init_f
2543 + *
2544 + * Description: Init SPI-Controller (ROM part)
2545 + *
2546 + * return: ---
2547 + *
2548 + * *********************************************************************** */
2549 +void spi_init_f (void)
2550 +{
2551 +}
2552 +
2553 +/* **************************************************************************
2554 + *
2555 + * Function: spi_init_r
2556 + *
2557 + * Description: Init SPI-Controller (RAM part) -
2558 + * The malloc engine is ready and we can move our buffers to
2559 + * normal RAM
2560 + *
2561 + * return: ---
2562 + *
2563 + * *********************************************************************** */
2564 +void spi_init_r (void)
2565 +{
2566 + return;
2567 +}
2568 +
2569 +/****************************************************************************
2570 + * Function: spi_write
2571 + **************************************************************************** */
2572 +ssize_t spi_write (uchar *addr, int alen, uchar *buffer, int len)
2573 +{
2574 + unsigned long offset;
2575 + int start_block,end_block;
2576 + int start_byte,end_byte;
2577 + ERROR_CODE result = NO_ERR;
2578 + uchar temp[SECTOR_SIZE];
2579 + int i,num;
2580 +
2581 + offset = addr[0]<<16 | addr[1] <<8 | addr[2];
2582 + /* Get the start block number */
2583 + GetSectorNumber(offset, &start_block);
2584 + /* Get the end block number */
2585 + GetSectorNumber(offset + len, &end_block);
2586 +
2587 + for(num = start_block;num <= end_block;num ++){
2588 + ReadData(num*SECTOR_SIZE,SECTOR_SIZE,(int *)temp);
2589 + start_byte = num*SECTOR_SIZE;
2590 + end_byte = (num+1) * SECTOR_SIZE -1;
2591 + if(start_byte < offset) start_byte = offset;
2592 + if( end_byte > (offset+len)) end_byte = (offset+len-1);
2593 + for(i=start_byte;i<=end_byte;i++)
2594 + temp[i-num*SECTOR_SIZE] = buffer[i - offset];
2595 + EraseBlock(num);
2596 + result = WriteData(num*SECTOR_SIZE, SECTOR_SIZE, (int *)temp);
2597 + if(result != NO_ERR)
2598 + return 0;
2599 + printf(".");
2600 + }
2601 + return len;
2602 +}
2603 +
2604 +/****************************************************************************
2605 + * Function: spi_read
2606 + **************************************************************************** */
2607 +ssize_t spi_read (uchar *addr, int alen, uchar *buffer, int len)
2608 +{
2609 + unsigned long offset;
2610 + offset = addr[0]<<16 | addr[1] <<8 | addr[2];
2611 + ReadData ( offset, len, (int *)buffer );
2612 + return len;
2613 +}
2614 +
2615 +void SendSingleCommand( const int iCommand )
2616 +{
2617 + unsigned short dummy;
2618 +
2619 + /*turns on the SPI in single write mode*/
2620 + SetupSPI( (COMMON_SPI_SETTINGS|TIMOD01) );
2621 +
2622 + /*sends the actual command to the SPI TX register*/
2623 + *pSPI_TDBR = iCommand;
2624 + __builtin_bfin_ssync();
2625 +
2626 + /*The SPI status register will be polled to check the SPIF bit*/
2627 + Wait_For_SPIF();
2628 +
2629 + dummy = *pSPI_RDBR;
2630 +
2631 + /*The SPI will be turned off*/
2632 + SPI_OFF();
2633 +
2634 +}
2635 +
2636 +void SetupSPI( const int spi_setting )
2637 +{
2638 +
2639 + if(icache_status()||dcache_status())
2640 + udelay(CONFIG_CCLK_HZ/50000000);
2641 + /*sets up the PF2 to be the slave select of the SPI */
2642 + *pSPI_FLG = 0xFB04;
2643 + *pSPI_BAUD = CONFIG_SPI_BAUD;
2644 + *pSPI_CTL = spi_setting;
2645 + __builtin_bfin_ssync();
2646 +}
2647 +
2648 +void SPI_OFF(void)
2649 +{
2650 +
2651 + *pSPI_CTL = 0x0400; /* disable SPI*/
2652 + *pSPI_FLG = 0;
2653 + *pSPI_BAUD = 0;
2654 + __builtin_bfin_ssync();
2655 + udelay(CONFIG_CCLK_HZ/50000000);
2656 +
2657 +}
2658 +
2659 +void Wait_For_SPIF(void)
2660 +{
2661 + unsigned short dummyread;
2662 + while( (*pSPI_STAT&TXS));
2663 + while(!(*pSPI_STAT&SPIF));
2664 + while(!(*pSPI_STAT&RXS));
2665 + dummyread = *pSPI_RDBR; // Read dummy to empty the receive register
2666 +
2667 +}
2668 +
2669 +ERROR_CODE Wait_For_WEL(void)
2670 +{
2671 + int i;
2672 + char status_register = 0;
2673 + ERROR_CODE ErrorCode = NO_ERR; /* tells us if there was an error erasing flash*/
2674 +
2675 + for(i = 0; i < TIMEOUT; i++)
2676 + {
2677 + status_register = ReadStatusRegister();
2678 + if( (status_register & WEL) )
2679 + {
2680 + ErrorCode = NO_ERR; /* tells us if there was an error erasing flash*/
2681 + break;
2682 + }
2683 + ErrorCode = POLL_TIMEOUT; /* Time out error*/
2684 + };
2685 +
2686 + return ErrorCode;
2687 +}
2688 +
2689 +ERROR_CODE Wait_For_Status( char Statusbit )
2690 +{
2691 + int i;
2692 + char status_register = 0xFF;
2693 + ERROR_CODE ErrorCode = NO_ERR; /* tells us if there was an error erasing flash */
2694 +
2695 + for(i = 0; i < TIMEOUT; i++)
2696 + {
2697 + status_register = ReadStatusRegister();
2698 + if( !(status_register & Statusbit) )
2699 + {
2700 + ErrorCode = NO_ERR; /* tells us if there was an error erasing flash */
2701 + break;
2702 + }
2703 + ErrorCode = POLL_TIMEOUT; /* Time out error */
2704 + };
2705 +
2706 +
2707 + return ErrorCode;
2708 +}
2709 +
2710 +
2711 +char ReadStatusRegister(void)
2712 +{
2713 + char status_register = 0;
2714 +
2715 + SetupSPI( (COMMON_SPI_SETTINGS|TIMOD01) ); /* Turn on the SPI */
2716 +
2717 + *pSPI_TDBR = SPI_RDSR; /* send instruction to read status register */
2718 + __builtin_bfin_ssync();
2719 + Wait_For_SPIF(); /*wait until the instruction has been sent*/
2720 + *pSPI_TDBR = 0; /*send dummy to receive the status register*/
2721 + __builtin_bfin_ssync();
2722 + Wait_For_SPIF(); /*wait until the data has been sent*/
2723 + status_register = *pSPI_RDBR; /*read the status register*/
2724 +
2725 + SPI_OFF(); /* Turn off the SPI */
2726 +
2727 + return status_register;
2728 +}
2729 +
2730 +ERROR_CODE GetSectorNumber( unsigned long ulOffset, int *pnSector )
2731 +{
2732 + int nSector = 0;
2733 + ERROR_CODE ErrorCode = NO_ERR;
2734 +
2735 + if(ulOffset > (NUM_SECTORS*0x10000 -1)){
2736 + ErrorCode = INVALID_SECTOR;
2737 + return ErrorCode;
2738 + }
2739 +
2740 + nSector = (int)ulOffset/0x10000;
2741 + *pnSector = nSector;
2742 +
2743 + // ok
2744 + return ErrorCode;
2745 +}
2746 +
2747 +ERROR_CODE EraseBlock( int nBlock )
2748 +{
2749 + unsigned long ulSectorOff = 0x0, ShiftValue;
2750 + ERROR_CODE ErrorCode = NO_ERR;
2751 +
2752 +
2753 + // if the block is invalid just return
2754 + if ( (nBlock < 0) || (nBlock > NUM_SECTORS) )
2755 + {
2756 + ErrorCode = INVALID_BLOCK; // tells us if there was an error erasing flash
2757 + return ErrorCode;
2758 + }
2759 +
2760 + // figure out the offset of the block in flash
2761 + if ( (nBlock >= 0) && (nBlock < NUM_SECTORS) )
2762 + {
2763 + ulSectorOff = (nBlock * SECTOR_SIZE);
2764 +
2765 + }
2766 + else
2767 + {
2768 + ErrorCode = INVALID_BLOCK; // tells us if there was an error erasing flash
2769 + return ErrorCode;
2770 + }
2771 +
2772 + // A write enable instruction must previously have been executed
2773 + SendSingleCommand(SPI_WREN);
2774 +
2775 + //The status register will be polled to check the write enable latch "WREN"
2776 + ErrorCode = Wait_For_WEL();
2777 +
2778 + if( POLL_TIMEOUT == ErrorCode )
2779 + {
2780 + printf("SPI Erase block error\n");
2781 + return ErrorCode;
2782 + }
2783 + else
2784 +
2785 +
2786 + //Turn on the SPI to send single commands
2787 + SetupSPI( (COMMON_SPI_SETTINGS|TIMOD01) );
2788 +
2789 + // Send the erase block command to the flash followed by the 24 address
2790 + // to point to the start of a sector.
2791 + *pSPI_TDBR = SPI_SE;
2792 + __builtin_bfin_ssync();
2793 + Wait_For_SPIF();
2794 + ShiftValue = (ulSectorOff >> 16); // Send the highest byte of the 24 bit address at first
2795 + *pSPI_TDBR = ShiftValue;
2796 + __builtin_bfin_ssync();
2797 + Wait_For_SPIF(); // Wait until the instruction has been sent
2798 + ShiftValue = (ulSectorOff >> 8); // Send the middle byte of the 24 bit address at second
2799 + *pSPI_TDBR = ShiftValue;
2800 + __builtin_bfin_ssync();
2801 + Wait_For_SPIF(); // Wait until the instruction has been sent
2802 + *pSPI_TDBR = ulSectorOff; // Send the lowest byte of the 24 bit address finally
2803 + __builtin_bfin_ssync();
2804 + Wait_For_SPIF(); // Wait until the instruction has been sent
2805 +
2806 + //Turns off the SPI
2807 + SPI_OFF();
2808 +
2809 + // Poll the status register to check the Write in Progress bit
2810 + // Sector erase takes time
2811 + ErrorCode = Wait_For_Status(WIP);
2812 +
2813 + // block erase should be complete
2814 + return ErrorCode;
2815 +}
2816 +
2817 +/*****************************************************************************
2818 +* ERROR_CODE ReadData()
2819 +*
2820 +* Read a value from flash for verify purpose
2821 +*
2822 +* Inputs: unsigned long ulStart - holds the SPI start address
2823 +* int pnData - pointer to store value read from flash
2824 +* long lCount - number of elements to read
2825 +***************************************************************************** */
2826 +ERROR_CODE ReadData( unsigned long ulStart, long lCount,int *pnData )
2827 +{
2828 + unsigned long ShiftValue;
2829 + char *cnData,ReadValue;
2830 + int i;
2831 +
2832 + cnData = (char *)pnData; /* Pointer cast to be able to increment byte wise */
2833 +
2834 + // Start SPI interface
2835 + SetupSPI( (COMMON_SPI_SETTINGS|TIMOD01) );
2836 +
2837 +#ifdef CONFIG_SERIAL_BF537_USE_FAST_READ
2838 + *pSPI_TDBR = SPI_FAST_READ; // Send the read command to SPI device
2839 +#else
2840 + *pSPI_TDBR = SPI_READ; // Send the read command to SPI device
2841 +#endif
2842 + __builtin_bfin_ssync();
2843 + Wait_For_SPIF(); // Wait until the instruction has been sent
2844 + ShiftValue = (ulStart >> 16); // Send the highest byte of the 24 bit address at first
2845 + *pSPI_TDBR = ShiftValue; // Send the byte to the SPI device
2846 + __builtin_bfin_ssync();
2847 + Wait_For_SPIF(); // Wait until the instruction has been sent
2848 + ShiftValue = (ulStart >> 8); // Send the middle byte of the 24 bit address at second
2849 + *pSPI_TDBR = ShiftValue; // Send the byte to the SPI device
2850 + __builtin_bfin_ssync();
2851 + Wait_For_SPIF(); // Wait until the instruction has been sent
2852 + *pSPI_TDBR = ulStart; // Send the lowest byte of the 24 bit address finally
2853 + __builtin_bfin_ssync();
2854 + Wait_For_SPIF(); // Wait until the instruction has been sent
2855 +
2856 +#ifdef CONFIG_SERIAL_BF537_USE_FAST_READ
2857 + *pSPI_TDBR = 0; // Send dummy for FAST_READ
2858 + __builtin_bfin_ssync();
2859 + Wait_For_SPIF(); // Wait until the instruction has been sent
2860 +#endif
2861 +
2862 + // After the SPI device address has been placed on the MOSI pin the data can be
2863 + // received on the MISO pin.
2864 + for (i=0; i<lCount; i++)
2865 + {
2866 + *pSPI_TDBR = 0; //send dummy
2867 + __builtin_bfin_ssync();
2868 + while(!(*pSPI_STAT&RXS));
2869 + *cnData++ = *pSPI_RDBR; //read
2870 +
2871 + if((i>=SECTOR_SIZE)&&(i%SECTOR_SIZE == 0))
2872 + printf(".");
2873 + }
2874 +
2875 + SPI_OFF(); // Turn off the SPI
2876 +
2877 + return NO_ERR;
2878 +}
2879 +
2880 +ERROR_CODE WriteFlash ( unsigned long ulStartAddr, long lTransferCount, int *iDataSource, long *lWriteCount )
2881 +{
2882 +
2883 + unsigned long ulWAddr;
2884 + long lWTransferCount = 0;
2885 + int i;
2886 + char iData;
2887 + char *temp = (char *)iDataSource;
2888 + ERROR_CODE ErrorCode = NO_ERR; // tells us if there was an error erasing flash
2889 +
2890 + // First, a Write Enable Command must be sent to the SPI.
2891 + SendSingleCommand(SPI_WREN);
2892 +
2893 + // Second, the SPI Status Register will be tested whether the
2894 + // Write Enable Bit has been set.
2895 + ErrorCode = Wait_For_WEL();
2896 + if( POLL_TIMEOUT == ErrorCode )
2897 + {
2898 + printf("SPI Write Time Out\n");
2899 + return ErrorCode;
2900 + }
2901 + else
2902 + // Third, the 24 bit address will be shifted out the SPI MOSI bytewise.
2903 + SetupSPI( (COMMON_SPI_SETTINGS|TIMOD01) ); // Turns the SPI on
2904 + *pSPI_TDBR = SPI_PP;
2905 + __builtin_bfin_ssync();
2906 + Wait_For_SPIF(); //wait until the instruction has been sent
2907 + ulWAddr = (ulStartAddr >> 16);
2908 + *pSPI_TDBR = ulWAddr;
2909 + __builtin_bfin_ssync();
2910 + Wait_For_SPIF(); //wait until the instruction has been sent
2911 + ulWAddr = (ulStartAddr >> 8);
2912 + *pSPI_TDBR = ulWAddr;
2913 + __builtin_bfin_ssync();
2914 + Wait_For_SPIF(); //wait until the instruction has been sent
2915 + ulWAddr = ulStartAddr;
2916 + *pSPI_TDBR = ulWAddr;
2917 + __builtin_bfin_ssync();
2918 + Wait_For_SPIF(); //wait until the instruction has been sent
2919 + // Fourth, maximum number of 256 bytes will be taken from the Buffer
2920 + // and sent to the SPI device.
2921 + for (i=0; (i < lTransferCount) && (i < 256); i++, lWTransferCount++)
2922 + {
2923 + iData = *temp;
2924 + *pSPI_TDBR = iData;
2925 + __builtin_bfin_ssync();
2926 + Wait_For_SPIF(); //wait until the instruction has been sent
2927 + temp++;
2928 + }
2929 +
2930 + SPI_OFF(); // Turns the SPI off
2931 +
2932 + // Sixth, the SPI Write in Progress Bit must be toggled to ensure the
2933 + // programming is done before start of next transfer.
2934 + ErrorCode = Wait_For_Status(WIP);
2935 +
2936 + if( POLL_TIMEOUT == ErrorCode )
2937 + {
2938 + printf("SPI Program Time out!\n");
2939 + return ErrorCode;
2940 + }
2941 + else
2942 +
2943 + *lWriteCount = lWTransferCount;
2944 +
2945 + return ErrorCode;
2946 +}
2947 +
2948 +
2949 +ERROR_CODE WriteData( unsigned long ulStart, long lCount, int *pnData )
2950 +{
2951 +
2952 + unsigned long ulWStart = ulStart;
2953 + long lWCount = lCount, lWriteCount;
2954 + long *pnWriteCount = &lWriteCount;
2955 +
2956 + ERROR_CODE ErrorCode = NO_ERR;
2957 +
2958 + while (lWCount != 0)
2959 + {
2960 + ErrorCode = WriteFlash(ulWStart, lWCount, pnData, pnWriteCount);
2961 +
2962 + // After each function call of WriteFlash the counter must be adjusted
2963 + lWCount -= *pnWriteCount;
2964 +
2965 + // Also, both address pointers must be recalculated.
2966 + ulWStart += *pnWriteCount;
2967 + pnData += *pnWriteCount/4;
2968 + }
2969 +
2970 + // return the appropriate error code
2971 + return ErrorCode;
2972 +}
2973 +
2974 +/*
2975 + * Spit out some useful information about the SPI eeprom
2976 + */
2977 +int eeprom_info(void)
2978 +{
2979 +#if (1)
2980 + return 1;
2981 +#else
2982 +
2983 + int ret = 0;
2984 +
2985 + SPI_INIT();
2986 +
2987 + if (spi_detect_part())
2988 + ret = 1;
2989 + else
2990 + printf("SPI Device: %s 0x%02X (%s) 0x%02X 0x%02X\n"
2991 + "Parameters: num sectors = %i, sector size = %i, write size = %i\n"
2992 + "Flash Size: %i mbit (%i mbyte)\n"
2993 + "Status: 0x%02X\n",
2994 + flash.flash->name, flash.manufacturer_id, flash.manufacturer->name,
2995 + flash.device_id1, flash.device_id2, flash.num_sectors,
2996 + flash.sector_size, flash.write_length,
2997 + (flash.num_sectors * flash.sector_size) >> 17,
2998 + (flash.num_sectors * flash.sector_size) >> 20,
2999 + read_status_register());
3000 +
3001 + SPI_DEINIT();
3002 +
3003 + return ret;
3004 +#endif
3005 +}
3006 +
3007 +
3008 +#endif /* CONFIG_SPI */
3009 diff --git a/u-boot-1.1.6/board/VuQuest2D/spi_flash.c b/u-boot-1.1.6/board/VuQuest2D/spi_flash.c
3010 new file mode 100644
3011 index 0000000..8784741
3012 --- /dev/null
3013 +++ b/u-boot-1.1.6/board/VuQuest2D/spi_flash.c
3014 @@ -0,0 +1,2 @@
3015 +/* Share the spi flash code */
3016 +#include "../bf537-stamp/spi_flash.c"
3017 diff --git a/u-boot-1.1.6/board/VuQuest2D/u-boot.lds.S b/u-boot-1.1.6/board/VuQuest2D/u-boot.lds.S
3018 new file mode 100644
3019 index 0000000..01780c5
3020 --- /dev/null
3021 +++ b/u-boot-1.1.6/board/VuQuest2D/u-boot.lds.S
3022 @@ -0,0 +1,136 @@
3023 +/*
3024 + * U-boot - u-boot.lds.S
3025 + *
3026 + * Copyright (c) 2005-2008 Analog Device Inc.
3027 + *
3028 + * (C) Copyright 2000-2004
3029 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
3030 + *
3031 + * See file CREDITS for list of people who contributed to this
3032 + * project.
3033 + *
3034 + * This program is free software; you can redistribute it and/or
3035 + * modify it under the terms of the GNU General Public License as
3036 + * published by the Free Software Foundation; either version 2 of
3037 + * the License, or (at your option) any later version.
3038 + *
3039 + * This program is distributed in the hope that it will be useful,
3040 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3041 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3042 + * GNU General Public License for more details.
3043 + *
3044 + * You should have received a copy of the GNU General Public License
3045 + * along with this program; if not, write to the Free Software
3046 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
3047 + * MA 02111-1307 USA
3048 + */
3049 +
3050 +#include <config.h>
3051 +#include <asm/blackfin.h>
3052 +#undef ALIGN
3053 +
3054 +/* If we don't actually load anything into L1 data, this will avoid
3055 + * a syntax error. If we do actually load something into L1 data,
3056 + * we'll get a linker memory load error (which is what we'd want).
3057 + * This is here in the first place so we can quickly test building
3058 + * for different CPU's which may lack non-cache L1 data.
3059 + */
3060 +#ifndef L1_DATA_B_SRAM
3061 +# define L1_DATA_B_SRAM CFG_MONITOR_BASE
3062 +# define L1_DATA_B_SRAM_SIZE 0
3063 +#endif
3064 +
3065 +OUTPUT_ARCH(bfin)
3066 +
3067 +/* The 0xC offset is so we don't clobber the tiny LDR jump block. */
3068 +MEMORY
3069 +{
3070 + ram : ORIGIN = CFG_MONITOR_BASE, LENGTH = CFG_MONITOR_LEN
3071 + l1_code : ORIGIN = L1_INST_SRAM+0xC, LENGTH = L1_INST_SRAM_SIZE
3072 + l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
3073 +}
3074 +
3075 +SECTIONS
3076 +{
3077 + .text :
3078 + {
3079 +#ifdef ENV_IS_EMBEDDED
3080 + /* WARNING - the following is hand-optimized to fit within
3081 + * the sector before the environment sector. If it throws
3082 + * an error during compilation remove an object here to get
3083 + * it linked after the configuration sector.
3084 + */
3085 +
3086 + cpu/blackfin/start.o (.text)
3087 + cpu/blackfin/traps.o (.text)
3088 + cpu/blackfin/interrupt.o (.text)
3089 + cpu/blackfin/serial.o (.text)
3090 + common/dlmalloc.o (.text)
3091 + lib_generic/crc32.o (.text)
3092 +
3093 + . = DEFINED(env_offset) ? env_offset : .;
3094 + common/environment.o (.text)
3095 +#endif
3096 +
3097 + *(.text .text.*)
3098 + } >ram
3099 +
3100 + .rodata :
3101 + {
3102 + . = ALIGN(4);
3103 + *(.rodata .rodata.*)
3104 + *(.rodata1)
3105 + *(.eh_frame)
3106 + . = ALIGN(4);
3107 + } >ram
3108 +
3109 + .data :
3110 + {
3111 + . = ALIGN(256);
3112 + *(.data .data.*)
3113 + *(.data1)
3114 + *(.sdata)
3115 + *(.sdata2)
3116 + *(.dynamic)
3117 + CONSTRUCTORS
3118 + } >ram
3119 +
3120 + .u_boot_cmd :
3121 + {
3122 + ___u_boot_cmd_start = .;
3123 + *(.u_boot_cmd)
3124 + ___u_boot_cmd_end = .;
3125 + } >ram
3126 +
3127 + .text_l1 :
3128 + {
3129 + . = ALIGN(4);
3130 + __stext_l1 = .;
3131 + *(.l1.text)
3132 + . = ALIGN(4);
3133 + __etext_l1 = .;
3134 + } >l1_code AT>ram
3135 + __stext_l1_lma = LOADADDR(.text_l1);
3136 +
3137 + .data_l1 :
3138 + {
3139 + . = ALIGN(4);
3140 + __sdata_l1 = .;
3141 + *(.l1.data)
3142 + *(.l1.bss)
3143 + . = ALIGN(4);
3144 + __edata_l1 = .;
3145 + } >l1_data AT>ram
3146 + __sdata_l1_lma = LOADADDR(.data_l1);
3147 +
3148 + .bss :
3149 + {
3150 + . = ALIGN(4);
3151 + __bss_start = .;
3152 + *(.sbss) *(.scommon)
3153 + *(.dynbss)
3154 + *(.bss .bss.*)
3155 + *(COMMON)
3156 + __bss_end = .;
3157 + } >ram
3158 +}
3159 diff --git a/u-boot-1.1.6/board/VuQuest2D/video.c b/u-boot-1.1.6/board/VuQuest2D/video.c
3160 new file mode 100644
3161 index 0000000..2d6f7a4
3162 --- /dev/null
3163 +++ b/u-boot-1.1.6/board/VuQuest2D/video.c
3164 @@ -0,0 +1,187 @@
3165 +/*
3166 + * (C) Copyright 2000
3167 + * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it
3168 + * (C) Copyright 2002
3169 + * Wolfgang Denk, wd@denx.de
3170 + * (C) Copyright 2006
3171 + * Aubrey Li, aubrey.li@analog.com
3172 + *
3173 + * See file CREDITS for list of people who contributed to this
3174 + * project.
3175 + *
3176 + * This program is free software; you can redistribute it and/or
3177 + * modify it under the terms of the GNU General Public License as
3178 + * published by the Free Software Foundation; either version 2 of
3179 + * the License, or (at your option) any later version.
3180 + *
3181 + * This program is distributed in the hope that it will be useful,
3182 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3183 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3184 + * GNU General Public License for more details.
3185 + *
3186 + * You should have received a copy of the GNU General Public License
3187 + * along with this program; if not, write to the Free Software
3188 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
3189 + * MA 02111-1307 USA
3190 + */
3191 +
3192 +#include <stdarg.h>
3193 +#include <common.h>
3194 +#include <config.h>
3195 +#include <malloc.h>
3196 +#include <asm/blackfin.h>
3197 +#include <asm/mach-common/bits/dma.h>
3198 +#include <i2c.h>
3199 +#include <linux/types.h>
3200 +#include <devices.h>
3201 +
3202 +int gunzip(void *, int, unsigned char *, unsigned long *);
3203 +
3204 +#ifdef CONFIG_VIDEO
3205 +
3206 +#define DMA_SIZE16 2
3207 +
3208 +#include <asm/mach-common/bits/ppi.h>
3209 +
3210 +#define NTSC_FRAME_ADDR 0x06000000
3211 +#include "video.h"
3212 +
3213 +/* NTSC OUTPUT SIZE 720 * 240 */
3214 +#define VERTICAL 2
3215 +#define HORIZONTAL 4
3216 +
3217 +int is_vblank_line(const int line)
3218 +{
3219 + /*
3220 + * This array contains a single bit for each line in
3221 + * an NTSC frame.
3222 + */
3223 + if ((line <= 18) || (line >= 264 && line <= 281) || (line == 528))
3224 + return true;
3225 +
3226 + return false;
3227 +}
3228 +
3229 +int NTSC_framebuffer_init(char *base_address)
3230 +{
3231 + const int NTSC_frames = 1;
3232 + const int NTSC_lines = 525;
3233 + char *dest = base_address;
3234 + int frame_num, line_num;
3235 +
3236 + for (frame_num = 0; frame_num < NTSC_frames; ++frame_num) {
3237 + for (line_num = 1; line_num <= NTSC_lines; ++line_num) {
3238 + unsigned int code;
3239 + int offset = 0;
3240 + int i;
3241 +
3242 + if (is_vblank_line(line_num))
3243 + offset++;
3244 +
3245 + if (line_num > 266 || line_num < 3)
3246 + offset += 2;
3247 +
3248 + /* Output EAV code */
3249 + code = SystemCodeMap[offset].EAV;
3250 + write_dest_byte((char)(code >> 24) & 0xff);
3251 + write_dest_byte((char)(code >> 16) & 0xff);
3252 + write_dest_byte((char)(code >> 8) & 0xff);
3253 + write_dest_byte((char)(code) & 0xff);
3254 +
3255 + /* Output horizontal blanking */
3256 + for (i = 0; i < 67 * 2; ++i) {
3257 + write_dest_byte(0x80);
3258 + write_dest_byte(0x10);
3259 + }
3260 +
3261 + /* Output SAV */
3262 + code = SystemCodeMap[offset].SAV;
3263 + write_dest_byte((char)(code >> 24) & 0xff);
3264 + write_dest_byte((char)(code >> 16) & 0xff);
3265 + write_dest_byte((char)(code >> 8) & 0xff);
3266 + write_dest_byte((char)(code) & 0xff);
3267 +
3268 + /* Output empty horizontal data */
3269 + for (i = 0; i < 360 * 2; ++i) {
3270 + write_dest_byte(0x80);
3271 + write_dest_byte(0x10);
3272 + }
3273 + }
3274 + }
3275 +
3276 + return dest - base_address;
3277 +}
3278 +
3279 +void fill_frame(char *Frame, int Value)
3280 +{
3281 + int *OddPtr32;
3282 + int OddLine;
3283 + int *EvenPtr32;
3284 + int EvenLine;
3285 + int i;
3286 + int *data;
3287 + int m, n;
3288 +
3289 + /* fill odd and even frames */
3290 + for (OddLine = 22, EvenLine = 285; OddLine < 263; OddLine++, EvenLine++) {
3291 + OddPtr32 = (int *)((Frame + (OddLine * 1716)) + 276);
3292 + EvenPtr32 = (int *)((Frame + (EvenLine * 1716)) + 276);
3293 + for (i = 0; i < 360; i++, OddPtr32++, EvenPtr32++) {
3294 + *OddPtr32 = Value;
3295 + *EvenPtr32 = Value;
3296 + }
3297 + }
3298 +
3299 + for (m = 0; m < VERTICAL; m++) {
3300 + data = (int *)u_boot_logo.data;
3301 + for (OddLine = (22 + m), EvenLine = (285 + m);
3302 + OddLine < (u_boot_logo.height * VERTICAL) + (22 + m);
3303 + OddLine += VERTICAL, EvenLine += VERTICAL) {
3304 + OddPtr32 = (int *)((Frame + ((OddLine) * 1716)) + 276);
3305 + EvenPtr32 =
3306 + (int *)((Frame + ((EvenLine) * 1716)) + 276);
3307 + for (i = 0; i < u_boot_logo.width / 2; i++) {
3308 + /* enlarge one pixel to m x n */
3309 + for (n = 0; n < HORIZONTAL; n++) {
3310 + *OddPtr32++ = *data;
3311 + *EvenPtr32++ = *data;
3312 + }
3313 + data++;
3314 + }
3315 + }
3316 + }
3317 +}
3318 +
3319 +static void video_init(char *NTSCFrame)
3320 +{
3321 + NTSCFrame = (char *)NTSC_FRAME_ADDR;
3322 + NTSC_framebuffer_init(NTSCFrame);
3323 + fill_frame(NTSCFrame, BLUE);
3324 +
3325 + bfin_write_PPI_CONTROL(0x0082);
3326 + bfin_write_PPI_FRAME(0x020D);
3327 +
3328 + bfin_write_DMA0_START_ADDR(NTSCFrame);
3329 + bfin_write_DMA0_X_COUNT(0x035A);
3330 + bfin_write_DMA0_X_MODIFY(0x0002);
3331 + bfin_write_DMA0_Y_COUNT(0x020D);
3332 + bfin_write_DMA0_Y_MODIFY(0x0002);
3333 + bfin_write_DMA0_CONFIG(0x1015);
3334 + bfin_write_PPI_CONTROL(0x0083);
3335 +}
3336 +
3337 +int drv_video_init(void)
3338 +{
3339 + device_t videodev;
3340 +
3341 + video_init((void *)NTSC_FRAME_ADDR);
3342 +
3343 + memset(&videodev, 0, sizeof(videodev));
3344 + strcpy(videodev.name, "video");
3345 + videodev.ext = DEV_EXT_VIDEO;
3346 + videodev.flags = DEV_FLAGS_SYSTEM;
3347 +
3348 + return device_register(&videodev);
3349 +}
3350 +
3351 +#endif
3352 diff --git a/u-boot-1.1.6/board/VuQuest2D/video.h b/u-boot-1.1.6/board/VuQuest2D/video.h
3353 new file mode 100644
3354 index 0000000..d5a8bc8
3355 --- /dev/null
3356 +++ b/u-boot-1.1.6/board/VuQuest2D/video.h
3357 @@ -0,0 +1,25 @@
3358 +#include <video_logo.h>
3359 +#define write_dest_byte(val) {*dest++=val;}
3360 +#define BLACK (0x01800180) /* black pixel pattern */
3361 +#define BLUE (0x296E29F0) /* blue pixel pattern */
3362 +#define RED (0x51F0515A) /* red pixel pattern */
3363 +#define MAGENTA (0x6ADE6ACA) /* magenta pixel pattern */
3364 +#define GREEN (0x91229136) /* green pixel pattern */
3365 +#define CYAN (0xAA10AAA6) /* cyan pixel pattern */
3366 +#define YELLOW (0xD292D210) /* yellow pixel pattern */
3367 +#define WHITE (0xFE80FE80) /* white pixel pattern */
3368 +
3369 +#define true 1
3370 +#define false 0
3371 +
3372 +typedef struct {
3373 + unsigned int SAV;
3374 + unsigned int EAV;
3375 +} SystemCodeType;
3376 +
3377 +const SystemCodeType SystemCodeMap[4] = {
3378 + {0xFF000080, 0xFF00009D},
3379 + {0xFF0000AB, 0xFF0000B6},
3380 + {0xFF0000C7, 0xFF0000DA},
3381 + {0xFF0000EC, 0xFF0000F1}
3382 +};
3383 diff --git a/u-boot-1.1.6/common/Makefile b/u-boot-1.1.6/common/Makefile
3384 index f848123..c9cdabd 100644
3385 --- a/u-boot-1.1.6/common/Makefile
3386 +++ b/u-boot-1.1.6/common/Makefile
3387 @@ -51,7 +51,7 @@ COBJS = main.o ACEX1K.o altera.o bedbug.o circbuf.o \
3388 memsize.o miiphybb.o miiphyutil.o \
3389 s_record.o serial.o soft_i2c.o soft_spi.o spartan2.o spartan3.o \
3390 usb.o usb_kbd.o usb_storage.o \
3391 - virtex2.o xilinx.o crc16.o xyzModem.o cmd_mac.o
3392 + virtex2.o xilinx.o crc16.o xyzModem.o cmd_mac.o interface_select.o metro_pf.o
3393
3394 SRCS := $(AOBJS:.o=.S) $(COBJS:.o=.c)
3395 OBJS := $(addprefix $(obj),$(AOBJS) $(COBJS))
3396 diff --git a/u-boot-1.1.6/common/cmd_bdinfo.c b/u-boot-1.1.6/common/cmd_bdinfo.c
3397 index bba7b75..3b1fcfc 100644
3398 --- a/u-boot-1.1.6/common/cmd_bdinfo.c
3399 +++ b/u-boot-1.1.6/common/cmd_bdinfo.c
3400 @@ -91,36 +91,38 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
3401 print_str ("pevfreq", strmhz(buf, bd->bi_pevfreq));
3402 #endif
3403
3404 +#if (CONFIG_COMMANDS & CFG_CMD_NET)
3405 puts ("ethaddr =");
3406 for (i=0; i<6; ++i) {
3407 printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]);
3408 }
3409
3410 -#if defined(CONFIG_HAS_ETH1)
3411 + #if defined(CONFIG_HAS_ETH1)
3412 puts ("\neth1addr =");
3413 for (i=0; i<6; ++i) {
3414 printf ("%c%02X", i ? ':' : ' ', bd->bi_enet1addr[i]);
3415 }
3416 -#endif
3417 + #endif
3418
3419 -#if defined(CONFIG_HAS_ETH2)
3420 + #if defined(CONFIG_HAS_ETH2)
3421 puts ("\neth2addr =");
3422 for (i=0; i<6; ++i) {
3423 printf ("%c%02X", i ? ':' : ' ', bd->bi_enet2addr[i]);
3424 }
3425 -#endif
3426 + #endif
3427
3428 -#if defined(CONFIG_HAS_ETH3)
3429 + #if defined(CONFIG_HAS_ETH3)
3430 puts ("\neth3addr =");
3431 for (i=0; i<6; ++i) {
3432 printf ("%c%02X", i ? ':' : ' ', bd->bi_enet3addr[i]);
3433 }
3434 -#endif
3435 + #endif
3436
3437 -#ifdef CONFIG_HERMES
3438 + #ifdef CONFIG_HERMES
3439 print_str ("ethspeed", strmhz(buf, bd->bi_ethspeed));
3440 -#endif
3441 + #endif
3442 puts ("\nIP addr = "); print_IPaddr (bd->bi_ip_addr);
3443 +#endif /* (CONFIG_COMMANDS & CFG_CMD_NET) */
3444 printf ("\nbaudrate = %6ld bps\n", bd->bi_baudrate );
3445 return 0;
3446 }
3447 @@ -138,12 +140,13 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
3448 print_num ("flashsize", (ulong)bd->bi_flashsize);
3449 print_num ("flashoffset", (ulong)bd->bi_flashoffset);
3450
3451 +#if (CONFIG_COMMANDS & CFG_CMD_NET)
3452 puts ("ethaddr =");
3453 for (i=0; i<6; ++i) {
3454 printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]);
3455 }
3456 - puts ("\nip_addr = ");
3457 - print_IPaddr (bd->bi_ip_addr);
3458 + puts ("\nip_addr = "); print_IPaddr (bd->bi_ip_addr);
3459 +#endif
3460 printf ("\nbaudrate = %ld bps\n", bd->bi_baudrate);
3461
3462 return 0;
3463 @@ -167,13 +170,12 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
3464 print_num ("sram size", (ulong)bd->bi_sramsize);
3465 #endif
3466
3467 -#if defined(CFG_CMD_NET)
3468 +#if (CONFIG_COMMANDS & CFG_CMD_NET)
3469 puts ("ethaddr =");
3470 for (i=0; i<6; ++i) {
3471 printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]);
3472 }
3473 - puts ("\nip_addr = ");
3474 - print_IPaddr (bd->bi_ip_addr);
3475 + puts ("\nip_addr = "); print_IPaddr (bd->bi_ip_addr);
3476 #endif
3477
3478 printf ("\nbaudrate = %ld bps\n", bd->bi_baudrate);
3479 @@ -202,11 +204,12 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
3480 print_num("flashsize", (ulong)bd->bi_flashsize);
3481 print_num("flashoffset", (ulong)bd->bi_flashoffset);
3482
3483 +#if (CONFIG_COMMANDS & CFG_CMD_NET)
3484 puts("ethaddr =");
3485 for (i = 0; i < 6; ++i)
3486 printf("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]);
3487 - puts("\nip_addr = ");
3488 - print_IPaddr(bd->bi_ip_addr);
3489 + puts("\nip_addr = "); print_IPaddr(bd->bi_ip_addr);
3490 +#endif
3491 printf("\nbaudrate = %d bps\n", bd->bi_baudrate);
3492
3493 return 0;
3494 @@ -226,12 +229,13 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
3495 print_num ("flashsize", (ulong)bd->bi_flashsize);
3496 print_num ("flashoffset", (ulong)bd->bi_flashoffset);
3497
3498 +#if (CONFIG_COMMANDS & CFG_CMD_NET)
3499 puts ("ethaddr =");
3500 for (i=0; i<6; ++i) {
3501 printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]);
3502 }
3503 - puts ("\nip_addr = ");
3504 - print_IPaddr (bd->bi_ip_addr);
3505 + puts ("\nip_addr = "); print_IPaddr (bd->bi_ip_addr);
3506 +#endif
3507 printf ("\nbaudrate = %d bps\n", bd->bi_baudrate);
3508
3509 return 0;
3510 @@ -255,6 +259,7 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
3511 print_num("-> size", bd->bi_dram[i].size);
3512 }
3513
3514 +#if (CONFIG_COMMANDS & CFG_CMD_NET)
3515 puts ("ethaddr =");
3516 for (i=0; i<6; ++i) {
3517 printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]);
3518 @@ -262,6 +267,7 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
3519 puts ( "\n"
3520 "ip_addr = ");
3521 print_IPaddr (bd->bi_ip_addr);
3522 +#endif
3523 printf ("\n"
3524 "baudrate = %d bps\n", bd->bi_baudrate);
3525
3526 diff --git a/u-boot-1.1.6/common/cmd_bootm.c b/u-boot-1.1.6/common/cmd_bootm.c
3527 index e6fe472..8711ff4 100644
3528 --- a/u-boot-1.1.6/common/cmd_bootm.c
3529 +++ b/u-boot-1.1.6/common/cmd_bootm.c
3530 @@ -150,6 +150,13 @@ image_header_t header;
3531
3532 ulong load_addr = CFG_LOAD_ADDR; /* Default Load Address */
3533
3534 +#if defined(CONFIG_METROLOGIC_INTERFACE_DETECTION)
3535 +
3536 +extern int Get_Interface_AtoD_Value(void);
3537 +extern void Send_Interface_AtoD_to_kernel(void);
3538 +
3539 +#endif
3540 +
3541 int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
3542 {
3543 ulong iflag;
3544 @@ -415,6 +422,12 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
3545 #ifdef CONFIG_SILENT_CONSOLE
3546 fixup_silent_linux();
3547 #endif
3548 +#if defined(CONFIG_METROLOGIC_INTERFACE_DETECTION)
3549 + if (Get_Interface_AtoD_Value() >= 0)
3550 + {
3551 + Send_Interface_AtoD_to_kernel();
3552 + }
3553 +#endif
3554 do_bootm_linux (cmdtp, flag, argc, argv,
3555 addr, len_ptr, verify);
3556 break;
3557 diff --git a/u-boot-1.1.6/common/cmd_eeprom.c b/u-boot-1.1.6/common/cmd_eeprom.c
3558 index cb7963f..84d65aa 100644
3559 --- a/u-boot-1.1.6/common/cmd_eeprom.c
3560 +++ b/u-boot-1.1.6/common/cmd_eeprom.c
3561 @@ -42,6 +42,14 @@
3562 #include <command.h>
3563 #include <i2c.h>
3564
3565 +#define DEBUG_BOOT_PERFORMANCE 1
3566 +
3567 +#if (DEBUG_BOOT_PERFORMANCE)
3568 +#include <Metrologic_Hardware.h>
3569 +#include <metro_pf.h>
3570 +#endif
3571 +
3572 +
3573 #if (CONFIG_COMMANDS & CFG_CMD_EEPROM) || defined(CFG_ENV_IS_IN_EEPROM)
3574
3575 extern void eeprom_init (void);
3576 @@ -139,6 +147,10 @@ int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt
3577 unsigned blk_off;
3578 int rcode = 0;
3579
3580 +
3581 +#if (DEBUG_BOOT_PERFORMANCE) && defined(__ADSPBF531__)
3582 + *pFIO_FLAG_D |= (PF4); /* Assert Aiming_On */
3583 +#endif
3584 /* Read data until done or would cross a page boundary.
3585 * We must write the address again when changing pages
3586 * because the next page may be in a different device.
3587 diff --git a/u-boot-1.1.6/common/cmd_load.c b/u-boot-1.1.6/common/cmd_load.c
3588 index f63b8e8..0c64bc9 100644
3589 --- a/u-boot-1.1.6/common/cmd_load.c
3590 +++ b/u-boot-1.1.6/common/cmd_load.c
3591 @@ -25,11 +25,14 @@
3592 * Serial up- and download support
3593 */
3594 #include <common.h>
3595 +#include <watchdog.h>
3596 #include <command.h>
3597 #include <s_record.h>
3598 #include <net.h>
3599 #include <exports.h>
3600 #include <xyzModem.h>
3601 +#include <asm/mach-common/bits/bootrom.h>
3602 +#include <Metrologic_Hardware.h>
3603
3604 DECLARE_GLOBAL_DATA_PTR;
3605
3606 @@ -84,9 +87,11 @@ int do_load_serial (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
3607 if (load_baudrate != current_baudrate) {
3608 printf ("## Switch baudrate to %d bps and press ENTER ...\n",
3609 load_baudrate);
3610 + WATCHDOG_RESET(); /* Trigger watchdog, if needed */
3611 udelay(50000);
3612 gd->baudrate = load_baudrate;
3613 serial_setbrg ();
3614 + WATCHDOG_RESET(); /* Trigger watchdog, if needed */
3615 udelay(50000);
3616 for (;;) {
3617 if (getc() == '\r')
3618 @@ -127,9 +132,11 @@ int do_load_serial (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
3619 if (load_baudrate != current_baudrate) {
3620 printf ("## Switch baudrate to %d bps and press ESC ...\n",
3621 current_baudrate);
3622 + WATCHDOG_RESET(); /* Trigger watchdog, if needed */
3623 udelay (50000);
3624 gd->baudrate = current_baudrate;
3625 serial_setbrg ();
3626 + WATCHDOG_RESET(); /* Trigger watchdog, if needed */
3627 udelay (50000);
3628 for (;;) {
3629 if (getc() == 0x1B) /* ESC */
3630 @@ -282,9 +289,11 @@ int do_save_serial (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
3631 if (save_baudrate != current_baudrate) {
3632 printf ("## Switch baudrate to %d bps and press ENTER ...\n",
3633 save_baudrate);
3634 + WATCHDOG_RESET(); /* Trigger watchdog, if needed */
3635 udelay(50000);
3636 gd->baudrate = save_baudrate;
3637 serial_setbrg ();
3638 + WATCHDOG_RESET(); /* Trigger watchdog, if needed */
3639 udelay(50000);
3640 for (;;) {
3641 if (getc() == '\r')
3642 @@ -311,9 +320,11 @@ int do_save_serial (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
3643 if (save_baudrate != current_baudrate) {
3644 printf ("## Switch baudrate to %d bps and press ESC ...\n",
3645 (int)current_baudrate);
3646 + WATCHDOG_RESET(); /* Trigger watchdog, if needed */
3647 udelay (50000);
3648 gd->baudrate = current_baudrate;
3649 serial_setbrg ();
3650 + WATCHDOG_RESET(); /* Trigger watchdog, if needed */
3651 udelay (50000);
3652 for (;;) {
3653 if (getc() == 0x1B) /* ESC */
3654 @@ -466,9 +477,11 @@ int do_load_serial_bin (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
3655 if (load_baudrate != current_baudrate) {
3656 printf ("## Switch baudrate to %d bps and press ENTER ...\n",
3657 load_baudrate);
3658 + WATCHDOG_RESET(); /* Trigger watchdog, if needed */
3659 udelay(50000);
3660 gd->baudrate = load_baudrate;
3661 serial_setbrg ();
3662 + WATCHDOG_RESET(); /* Trigger watchdog, if needed */
3663 udelay(50000);
3664 for (;;) {
3665 if (getc() == '\r')
3666 @@ -504,9 +517,11 @@ int do_load_serial_bin (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
3667 if (load_baudrate != current_baudrate) {
3668 printf ("## Switch baudrate to %d bps and press ESC ...\n",
3669 current_baudrate);
3670 + WATCHDOG_RESET(); /* Trigger watchdog, if needed */
3671 udelay (50000);
3672 gd->baudrate = current_baudrate;
3673 serial_setbrg ();
3674 + WATCHDOG_RESET(); /* Trigger watchdog, if needed */
3675 udelay (50000);
3676 for (;;) {
3677 if (getc() == 0x1B) /* ESC */
3678 @@ -1036,6 +1051,406 @@ static ulong load_serial_ymodem (ulong offset)
3679 return offset;
3680 }
3681
3682 +/**********************************************************************
3683 + *************** Added by Metrologic *********************************
3684 + **********************************************************************/
3685 +
3686 +extern flash_info_t flash_info[]; /* info for FLASH chips */
3687 +
3688 +int do_flash (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
3689 +{
3690 +#ifdef CFG_NO_FLASH
3691 + return 0;
3692 +#else
3693 + ulong addr_first;
3694 + ulong addr_last;
3695 + ulong addr = load_addr;
3696 + ulong dest;
3697 + ulong count;
3698 + int rc = 0;
3699 + char *s;
3700 +
3701 + if (argc != 2)
3702 + {
3703 + goto __DO_FLASH_ERROR;
3704 + }
3705 +
3706 + if ((s = getenv("filesize")) != NULL)
3707 + {
3708 + count = simple_strtoul(s, NULL, 16);
3709 + }
3710 + else
3711 + {
3712 + puts ("Unknown filesize! Download file first!\n");
3713 + return 1;;
3714 + }
3715 +
3716 + if (strcmp(argv[1] ,"u-boot") == 0)
3717 + {
3718 + int i;
3719 + flash_info_t *info;
3720 + int protect_on = 0;
3721 + int bank;
3722 + int p = 0;
3723 +
3724 + puts ("Unprotecting flash sectors... ");
3725 +
3726 + for (bank=1; bank<=CFG_MAX_FLASH_BANKS; ++bank) {
3727 + info = &flash_info[bank-1];
3728 + if (info->flash_id == FLASH_UNKNOWN) {
3729 + continue;
3730 + }
3731 + printf ("%sProtect Flash Bank # %ld\n",
3732 + p ? "" : "Un-", bank);
3733 +
3734 + for (i=0; i<info->sector_count; ++i) {
3735 +#if defined(CFG_FLASH_PROTECTION)
3736 + if (flash_real_protect(info, i, p))
3737 + rcode = 1;
3738 + putc ('.');
3739 +#else
3740 + info->protect[i] = p;
3741 +#endif /* CFG_FLASH_PROTECTION */
3742 + }
3743 + }
3744 +
3745 + puts ("Done\n");
3746 +
3747 + addr_first = (ulong)U_BOOT_START_ADDR;
3748 + addr_last = (ulong)CONFIG_START_ADDR - 1;
3749 +
3750 + dest = U_BOOT_START_ADDR;
3751 + rc = 1;
3752 + }
3753 + else if (strcmp(argv[1] ,"kernel") == 0)
3754 + {
3755 + addr_first = (ulong)KERNEL_START_ADDR;
3756 + addr_last = (ulong)FILSYS_START_ADDR - 1;
3757 +
3758 + dest = KERNEL_START_ADDR;
3759 + rc = 2;
3760 + }
3761 + else if (strcmp(argv[1] ,"filesystem") == 0)
3762 + {
3763 +#ifndef CFG_FLASH_SIZE
3764 + puts ("CFG_FLASH_SIZE must be defined to use this feature!\n");
3765 + return 1;
3766 +#endif
3767 +
3768 + addr_first = (ulong)FILSYS_START_ADDR;
3769 + addr_last = (ulong)FLASH_PARTITION_START + (ulong)CFG_FLASH_SIZE - 1;
3770 +
3771 + dest = FILSYS_START_ADDR;
3772 + rc = 3;
3773 + }
3774 +
3775 + if (rc >= 1)
3776 + {
3777 + if (addr_last <= addr_first)
3778 + {
3779 + puts("Invalid CFG_FLASH_SIZE\n");
3780 + return 1;
3781 + }
3782 +
3783 + printf ("Erasing %s\n", argv[1]);
3784 +
3785 + if (flash_sect_erase(addr_first, addr_last))
3786 + {
3787 + printf ("Error erasing region %d - %d\n", addr_first, addr_last);
3788 + return 1;
3789 + }
3790 + puts ("Done\n");
3791 +
3792 + printf ("Copy %s to Flash... ", argv[1]);
3793 +
3794 + rc = flash_write ((uchar *)addr, dest, count);
3795 + if (rc != 0) {
3796 + flash_perror (rc);
3797 + return (1);
3798 + }
3799 + puts ("done\n");
3800 + return 0;
3801 + }
3802 +
3803 +__DO_FLASH_ERROR:
3804 +
3805 + printf ("Usage:\n%s\n", cmdtp->usage);
3806 + return 1;
3807 +#endif
3808 +}
3809 +
3810 +int do_eflash ( cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
3811 +{
3812 + const char *const fmt =
3813 + "\nEEPROM @0x%lX %s: addr %08lx off %04lx count %ld ... ";
3814 +
3815 + ulong dev_addr = CFG_DEF_EEPROM_ADDR;
3816 + ulong addr = load_addr;
3817 + ulong off;
3818 + ulong cnt;
3819 + char *s;
3820 + int rcode = 0;
3821 +
3822 + if (argc != 2)
3823 + {
3824 + goto __DO_EFLASH_ERROR;
3825 + }
3826 +
3827 + if ((s = getenv("filesize")) != NULL)
3828 + {
3829 + cnt = simple_strtoul(s, NULL, 16);
3830 + }
3831 + else
3832 + {
3833 + puts ("Unknown filesize! Download file first!\n");
3834 + return 1;
3835 + }
3836 +
3837 + if (strcmp(argv[1] ,"u-boot") == 0)
3838 + {
3839 + off = U_BOOT_START_OFFS;
3840 + rcode = 1;
3841 + }
3842 + else if (strcmp(argv[1] ,"kernel") == 0)
3843 + {
3844 + off = KERNEL_START_OFFS;
3845 + rcode = 2;
3846 + }
3847 + else if (strcmp(argv[1] ,"filesystem") == 0)
3848 + {
3849 + ulong addr_pad = load_addr - PADDING_BUFF_SIZE;
3850 + ulong bytes_to_erase = (ulong)CFG_FLASH_SIZE - 1 - FILSYS_START_OFFS;
3851 + ulong start_offset = FILSYS_START_OFFS;
3852 + int i;
3853 +
3854 + if (load_addr < PADDING_BUFF_SIZE)
3855 + {
3856 + printf ("load_addr too small, need %d bytes room to erase filesystem\n", PADDING_BUFF_SIZE);
3857 + return 1;
3858 + }
3859 +
3860 + for (i = 0; i < PADDING_BUFF_SIZE; i++)
3861 + {
3862 + *((u_char *)addr_pad) = (u_char)PADDING_CHAR;
3863 + addr_pad += 1;
3864 + }
3865 +
3866 + addr_pad = load_addr - PADDING_BUFF_SIZE;
3867 +
3868 + if (cnt >= 12)
3869 + {
3870 + for (i = 0; i < 12; i++)
3871 + {
3872 + *((u_char *)addr_pad) = *((u_char*)addr);
3873 + addr_pad += 1;
3874 + addr += 1;
3875 + }
3876 + }
3877 +
3878 + addr = load_addr;
3879 + addr_pad = load_addr - PADDING_BUFF_SIZE;
3880 +
3881 + puts ("Formatting file system partition... ");
3882 +
3883 + while (bytes_to_erase > 0)
3884 + {
3885 + ulong count;
3886 +
3887 + if ( bytes_to_erase > PADDING_BUFF_SIZE )
3888 + {
3889 + count = PADDING_BUFF_SIZE;
3890 + }
3891 + else
3892 + {
3893 + for (i = 0; i < 12; i++)
3894 + {
3895 + *((u_char *)addr_pad) = (u_char)PADDING_CHAR;
3896 + addr_pad += 1;
3897 + }
3898 + addr_pad = load_addr - PADDING_BUFF_SIZE;
3899 + count = bytes_to_erase;
3900 + }
3901 +
3902 + if (eeprom_write (dev_addr, start_offset, (uchar *) addr_pad, count))
3903 + {
3904 + printf("Error erasing %d to %d\n", start_offset, start_offset + count);
3905 + return 1;
3906 + }
3907 + else
3908 + {
3909 + puts (".");
3910 + }
3911 + start_offset += count;
3912 + bytes_to_erase -= count;
3913 + }
3914 +
3915 + puts ("done\n");
3916 + off = FILSYS_START_OFFS;
3917 + rcode = 3;
3918 + }
3919 +
3920 + if (rcode >= 1)
3921 + {
3922 + printf (fmt, dev_addr, "write", addr, off, cnt);
3923 + rcode = eeprom_write (dev_addr, off, (uchar *) addr, cnt);
3924 + puts ("done\n");
3925 + return rcode;
3926 + }
3927 +
3928 +__DO_EFLASH_ERROR:
3929 +
3930 + printf ("Usage:\n%s\n", cmdtp->usage);
3931 + return 1;
3932 +
3933 +}
3934 +
3935 +
3936 +int print_status (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
3937 +{
3938 + uint regval1, regval2, regval3, regval4;
3939 +
3940 +#if (defined(CONFIG_BF537) || defined(CONFIG_BF536) || defined(CONFIG_BF534) || \
3941 + defined(__ADSPBF537__) || defined(__ADSPBF536__) || defined(__ADSPBF534__) )
3942 +
3943 + regval1 = *pPORTF_FER;
3944 + regval2 = *pPORTFIO_DIR;
3945 + regval3 = *pPORTFIO_INEN;
3946 + regval4 = *pPORTFIO;
3947 +
3948 + printf ("PortF, FER 0x%04x, DIR 0x%04x, INEN 0x%04x, DATA 0x%04x\r\n",
3949 + regval1, regval2, regval3, regval4);
3950 +
3951 + regval1 = *pPORTG_FER;
3952 + regval2 = *pPORTGIO_DIR;
3953 + regval3 = *pPORTGIO_INEN;
3954 + regval4 = *pPORTGIO;
3955 +
3956 + printf ("PortG, FER 0x%04x, DIR 0x%04x, INEN 0x%04x, DATA 0x%04x\r\n",
3957 + regval1, regval2, regval3, regval4);
3958 +
3959 + regval1 = *pPORTH_FER;
3960 + regval2 = *pPORTHIO_DIR;
3961 + regval3 = *pPORTHIO_INEN;
3962 + regval4 = *pPORTHIO;
3963 +
3964 + printf ("PortH, FER 0x%04x, DIR 0x%04x, INEN 0x%04x, DATA 0x%04x\r\n",
3965 + regval1, regval2, regval3, regval4);
3966 +
3967 +#elif (defined(__ADSPBF531__) || defined(__ADSPBF532__) || defined(__ADSPBF533__) || \
3968 + defined(CONFIG_BF531) || defined(CONFIG_BF532) || defined(CONFIG_BF533) )
3969 +
3970 + regval1 = *pFIO_DIR;
3971 + regval2 = *pFIO_EDGE;
3972 + regval3 = *pFIO_INEN;
3973 + regval4 = *pFIO_FLAG_D;
3974 +
3975 + {
3976 + uint regval5 = *pFIO_POLAR;
3977 +
3978 + printf ("PortF, DIR 0x%04x, EDGE 0x%04x, INEN 0x%04x, DATA 0x%04x, POLAR 0x%04x\r\n",
3979 + regval1, regval2, regval3, regval4, regval5);
3980 + }
3981 +#else
3982 +#error "Unknown Blackfin platform..."
3983 +#endif
3984 +
3985 + regval1 = *pVR_CTL;
3986 + printf("VR_CTL = 0x%04x\r\n", regval1);
3987 +
3988 + return 0;
3989 +}
3990 +
3991 +extern void Configure_Interface_IO(void);
3992 +extern void DisplayInterfaceBoard(void);
3993 +
3994 +#if defined(CONFIG_METROLOGIC_INTERFACE_DETECTION)
3995 +
3996 +extern int Get_Interface_AtoD_Value(void);
3997 +extern void Send_Interface_AtoD_to_kernel(void);
3998 +int program_vrctl(int millivolt);
3999 +
4000 +#endif
4001 +
4002 +int interfaceboard_init (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
4003 +{
4004 + Configure_Interface_IO();
4005 + DisplayInterfaceBoard();
4006 +#if defined(CONFIG_METROLOGIC_INTERFACE_DETECTION)
4007 + if (Get_Interface_AtoD_Value() >= 0)
4008 + {
4009 + Send_Interface_AtoD_to_kernel();
4010 + }
4011 +#endif
4012 + return 0;
4013 +}
4014 +
4015 +int prog_vrctl (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
4016 +{
4017 + unsigned long voltage;
4018 +
4019 + if (argc != 2)
4020 + {
4021 + goto __PROG_VRCTL_ERROR;
4022 + }
4023 +
4024 + voltage = simple_strtoul(argv[1], NULL, 10);
4025 +
4026 + if (voltage < 850 || voltage > 1300)
4027 + {
4028 + goto __PROG_VRCTL_ERROR;
4029 + }
4030 +
4031 + if (voltage % 50)
4032 + {
4033 + goto __PROG_VRCTL_ERROR;
4034 + }
4035 +
4036 + program_vrctl(voltage);
4037 +
4038 + return 0;
4039 +
4040 +__PROG_VRCTL_ERROR:
4041 + printf ("Usage:\n%s\n", cmdtp->usage);
4042 + return 1;
4043 +}
4044 +
4045 +int program_vrctl(int millivolt)
4046 +{
4047 + int vlev = 6;
4048 + uint mask = 0xFF0F;
4049 +
4050 +#if defined(CONFIG_DISABLE_CLKIN_OUTPUT)
4051 +#if (CONFIG_DISABLE_CLKIN_OUTPUT)
4052 +
4053 + mask = 0xBF0F;
4054 +
4055 +#endif
4056 +#endif
4057 +
4058 + vlev = 6 + (millivolt - 850) / 50;
4059 +
4060 + disable_interrupts();
4061 +
4062 + if (millivolt < 850 || millivolt > 1300)
4063 + { /* Preserve the voltage setting but update the clkin-output */
4064 + *pVR_CTL = *pVR_CTL & (mask | 0x00f0);
4065 + }
4066 + else
4067 + {
4068 + *pVR_CTL = (*pVR_CTL & mask) | (vlev << 4);
4069 + }
4070 +
4071 + asm("idle;");
4072 +
4073 + enable_interrupts();
4074 +
4075 + return 0;
4076 +}
4077 +
4078 +/**********************************************************************
4079 + *************** Metrologic *********************************
4080 + **********************************************************************/
4081 +
4082 #endif /* CFG_CMD_LOADB */
4083
4084 /* -------------------------------------------------------------------- */
4085 @@ -1103,6 +1518,47 @@ U_BOOT_CMD(
4086 " with offset 'off' and baudrate 'baud'\n"
4087 );
4088
4089 +
4090 +/**********************************************************************
4091 + *************** Added by Metrologic *********************************
4092 + **********************************************************************/
4093 +
4094 +U_BOOT_CMD(
4095 + flash, 2, 0, do_flash,
4096 + "flash - save binary file to parallel flash\n",
4097 + "[ u-boot | kernel | filesystem ]\n"
4098 + " - save binary file to parallel flash\n"
4099 +);
4100 +
4101 +U_BOOT_CMD(
4102 + eflash, 2, 0, do_eflash,
4103 + "eflash - save binary file to EEPROM\n",
4104 + "[ u-boot | kernel | filesystem ]\n"
4105 + " - save binary file to EEPROM\n"
4106 +);
4107 +
4108 +U_BOOT_CMD(
4109 + status, 2, 0, print_status,
4110 + "status - Prints the status of different registers\n",
4111 + "\n"
4112 +);
4113 +
4114 +U_BOOT_CMD(
4115 + ibinit, 2, 0, interfaceboard_init,
4116 + "ibinit - Detect Interface Board and initialize IO \n",
4117 + "\n"
4118 +);
4119 +
4120 +U_BOOT_CMD(
4121 + vrctl, 2, 0, prog_vrctl,
4122 + "vrctl - Programs new voltage (mV) to Bfin Core [850 .. 1300]\n",
4123 + "\n"
4124 +);
4125 +
4126 +/**********************************************************************
4127 + *************** Metrologic *********************************
4128 + **********************************************************************/
4129 +
4130 #endif /* CFG_CMD_LOADB */
4131
4132 /* -------------------------------------------------------------------- */
4133 diff --git a/u-boot-1.1.6/common/cmd_mem.c b/u-boot-1.1.6/common/cmd_mem.c
4134 index 3f1023c..154035e 100644
4135 --- a/u-boot-1.1.6/common/cmd_mem.c
4136 +++ b/u-boot-1.1.6/common/cmd_mem.c
4137 @@ -1028,6 +1028,95 @@ int do_mem_mtest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
4138 }
4139
4140
4141 +/*
4142 + * Runs memory test from CFG_MEMTEST_END to CFG_MEMTEST_END.
4143 + */
4144 +
4145 +int FullRamTest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
4146 +{
4147 + int testcnt = 0;
4148 + int test_passed = 1;
4149 +
4150 + vu_long *addr_to_fail;
4151 + vu_long *current_addr;
4152 +
4153 + vu_long *start = (ulong *)CFG_MEMTEST_START;
4154 + vu_long *end = (ulong *)CFG_MEMTEST_END;
4155 +
4156 + ulong pattern1 = 0x5a5a5a5a;
4157 + ulong pattern2 = 0xa5a5a5a5;
4158 +
4159 + ulong val1, val2;
4160 +
4161 + if (argc > 2)
4162 + {
4163 + printf("Performing Full Ram Test from 0x%08x to 0x%08x:\n", CFG_MEMTEST_START, CFG_MEMTEST_END - 1);
4164 + }
4165 +
4166 + if ( argc < 2 )
4167 + {
4168 + addr_to_fail = (ulong *)CFG_MEMTEST_END + 0x1000;
4169 + }
4170 + else if (argc > 1)
4171 + {
4172 + addr_to_fail = (ulong *)simple_strtoul(argv[1], NULL, 16);
4173 + }
4174 +
4175 + for(current_addr = CFG_MEMTEST_START; current_addr < CFG_MEMTEST_END; current_addr+=2)
4176 + {
4177 + if ( (((long)current_addr & 0x3ffff) == 0) && (argc > 2) )
4178 + { /* print progress */
4179 + printf("0x%08x\r", current_addr);
4180 + }
4181 +
4182 + test_passed = 0;
4183 +
4184 + if (current_addr != addr_to_fail)
4185 + { /* Run memory test here */
4186 + *current_addr = pattern1;
4187 + *(current_addr + 1) = pattern2;
4188 +
4189 + val1 = *current_addr;
4190 + val2 = *(current_addr + 1);
4191 +
4192 + if ((val1 == pattern1) && (val2 == pattern2))
4193 + {
4194 + test_passed = 1;
4195 + }
4196 +
4197 + testcnt += 2;
4198 + }
4199 +
4200 + if (test_passed < 1 && argc > 2)
4201 + {
4202 + if (val1 != pattern1)
4203 + {
4204 + printf("Ram test failed at 0x%08x\n", current_addr);
4205 + printf("\rExpected 0x%08x but read 0x%08x \r\n", val1, pattern1);
4206 + }
4207 + if (val2 != pattern2)
4208 + {
4209 + printf("Ram test failed at 0x%08x\n", current_addr + 1);
4210 + printf("\rExpected 0x%08x but read 0x%08x \r\n", val2, pattern2);
4211 + }
4212 + }
4213 + }
4214 +
4215 + if (argc > 2)
4216 + {
4217 + printf("\nDone testing 0x%08x addresses!\n", testcnt);
4218 + }
4219 +
4220 + if (argc == 1)
4221 + {
4222 + printf("%d\r\n", test_passed);
4223 + }
4224 +
4225 + return test_passed ;
4226 +}
4227 +
4228 +
4229 +
4230 /* Modify memory.
4231 *
4232 * Syntax:
4233 @@ -1314,6 +1403,13 @@ U_BOOT_CMD(
4234 " - simple RAM read/write test\n"
4235 );
4236
4237 +U_BOOT_CMD(
4238 + ramtest, 3, 1, FullRamTest,
4239 + "ramtest - RAM test covering all but the last MB of Memory\n",
4240 + "[loop]\n"
4241 + " - RAM read/write test\n"
4242 +);
4243 +
4244 #ifdef CONFIG_MX_CYCLIC
4245 U_BOOT_CMD(
4246 mdc, 4, 1, do_mem_mdc,
4247 diff --git a/u-boot-1.1.6/common/interface_select.c b/u-boot-1.1.6/common/interface_select.c
4248 new file mode 100644
4249 index 0000000..d571105
4250 --- /dev/null
4251 +++ b/u-boot-1.1.6/common/interface_select.c<