2 target remote localhost:2000
7 target remote /dev/ttyS0
9 target remote /dev/tty$arg0
16 target remote udp:bfin:6443
19 target remote vapier:2000
22 target remote bfin:1234
27 # Misc Blackfin helper functions
31 printf "R0: %08x %-11i P0: %08x RETS: %08x LC0: %08x %u\n", $r0, $r0, $p0, $rets, $lc0, $lc0
32 printf "R1: %08x %-11i P1: %08x RETI: %08x LT0: %08x\n", $r1, $r1, $p1, $reti, $lt0
33 printf "R2: %08x %-11i P2: %08x RETX: %08x LB0: %08x\n", $r2, $r2, $p2, $retx, $lb0
34 printf "R3: %08x %-11i P3: %08x RETE: %08x LC1: %08x %u\n", $r3, $r3, $p3, $rete, $lc1, $lc1
35 printf "R4: %08x %-11i P4: %08x RETN: %08x LT1: %08x\n", $r4, $r4, $p4, $retn, $lt1
36 printf "R5: %08x %-11i P5: %08x ASTAT: %08x LB1: %08x\n", $r5, $r5, $p5, $astat, $lb1
37 printf "R6: %08x %-11i SP: %08x CC: %08x\n", $r6, $r6, $sp, $cc
38 printf "R7: %08x %-11i USP: %08x CYC1: %08x SEQSTAT: %08x\n", $r7, $r7, $usp, $cycles, $seqstat
39 printf "PC: %08x FP: %08x CYC2: %08x SYSCFG: %08x\n", $pc, $fp, $cycles2, $syscfg
43 Display the common core registers in a compact format.
48 printf " B0 : %08x L0 : %08x M0 : %08x I0 : %08x\n", $b0, $l0, $m0, $i0
49 printf " B1 : %08x L1 : %08x M1 : %08x I1 : %08x\n", $b1, $l1, $m1, $i1
50 printf " B2 : %08x L2 : %08x M2 : %08x I2 : %08x\n", $b2, $l2, $m2, $i2
51 printf " B3 : %08x L3 : %08x M3 : %08x I3 : %08x\n", $b3, $l3, $m3, $i3
52 printf "A0.w: %08x A0.x: %08x A1.w: %08x A1.x: %08x\n", $a0w, $a0x, $a1w, $a1x
56 Display all core registers in a compact format.
60 printf "ASTAT: %#x ( ", $astat
107 set $$inv = $astat & 0xfcf0ce90
109 printf "Invalid bits: %#x\n", $$inv
115 set $$seqstat = $arg0
117 set $$seqstat = $seqstat
119 set $$excause = ($$seqstat & 0x3f)
120 set $$sftreset = ($$seqstat & (0x1 << 13)) >> 13
121 set $$hwerrcause = ($$seqstat & (0x1f << 14)) >> 14
122 printf "SEQSTAT: %08x\n", $$seqstat
123 printf " EXCAUSE: 0x%x\t", $$excause
124 if $$excause >= 0x0 && $$excause <= 0xf
125 printf "(custom exception)"
128 printf "(single step)"
131 printf "(trace buffer full)"
134 printf "(undef inst)"
137 printf "(illegal inst)"
140 printf "(dcplb prot violation)"
143 printf "(misaligned data)"
146 printf "(unrecoverable event)"
149 printf "(dcplb miss)"
152 printf "(multiple dcplb hit)"
155 printf "(emulation watchpoint)"
158 printf "(misaligned inst)"
161 printf "(icplb prot violation)"
164 printf "(icplb miss)"
167 printf "(multiple icplb hit)"
170 printf "(illegal use of supervisor resource)"
173 printf " SFTRESET: 0x%x\t(last reset was ", $$sftreset
177 printf "a software reset)\n"
178 printf " HWERRCAUSE: 0x%x\t", $$hwerrcause
179 if $$hwerrcause == 0x2
180 printf "(system mmr error)"
182 if $$hwerrcause == 0x3
183 printf "(external memory addressing error)"
185 if $$hwerrcause == 0x12
186 printf "(performance monitor overflow)"
188 if $$hwerrcause == 0x18
189 printf "(raise 5 instruction)"
194 Usage: seqstat [value=$seqstat]
195 Parse the bits of the seqstat [value] into the human readable definitions.
200 set $$l1 = 0xffa00000
207 set *(unsigned short *)($$l1) = 0x0024
211 set *(unsigned long *)($$l1) = 0xffc0e14a
215 set *(unsigned long *)($$l1) = 0x0100e10a
219 set *(unsigned short *)($$l1) = 0x6038
223 set *(unsigned short *)($$l1) = 0x9310
227 set *(unsigned short *)($$l1) = 0x0024
231 set *(unsigned short *)($$l1) = 0x6000
235 set *(unsigned short *)($$l1) = 0x9310
239 set *(unsigned short *)($$l1) = 0x0024
243 set *(unsigned short *)($$l1) = 0x0091
247 if ($$l1 - $$pc) != 0x18
248 echo ERROR: jump.s has wrong offset
252 set *(unsigned short *)($$l1) = 0x2ff4
255 printf "Continuing.\n"
259 Usage: reset [L1 Instruction address=0xffa00000]
260 Cram the software reset code into [L1 Instruction address] and execute it.
261 This will perform both a system reset and a core reset.
265 set $$TBUFCTL = (unsigned long *)0xFFE06000
269 set $$TBUFCTL = (unsigned long *)0xFFE06000
273 set $$TBUFSTAT = (unsigned long *)0xFFE06004
274 set $$TBUF = (unsigned long *)0xFFE06100
276 if (!(*$$TBUFSTAT & 0x1F))
277 printf "Hardware trace buffer is empty\n"
279 while (*$$TBUFSTAT & 0x1F)
280 printf "%2i Target: ", $$i
291 Dump the hardware trace buffer. Remember, this is a destructive operation,
292 so it can only be dumped once.
296 printf "PLL_LOCKCNT: 0x%04x\n", *(unsigned short *)0xFFC00010
297 printf "VR_CTL: 0x%04x\n", *(unsigned short *)0xFFC00008
298 printf "PLL_DIV: 0x%04x\n", *(unsigned short *)0xFFC00004
299 printf "PLL_CTL: 0x%04x\n", *(unsigned short *)0xFFC00000
303 printf "SDRRC: 0x%04x\n", *(unsigned short *)0xFFC00A18
305 set $$SDBCTL = *(unsigned short *)0xFFC00A14
306 set $$EBCAW = ($$SDBCTL & 0x30) >> 4
307 set $$EBSZ = ($$SDBCTL & 0xe) >> 1
308 printf "SDBCTL: 0x%04x ", $$SDBCTL
346 set $$SDSTAT = *(unsigned short *)0xFFC00A1C
347 printf "SDSTAT: 0x%04x ", $$SDSTAT
348 if ($$SDSTAT & (1 << 0))
353 if ($$SDSTAT & (1 << 1))
354 printf "(self-refresh) "
356 if ($$SDSTAT & (1 << 2))
359 if ($$SDSTAT & (1 << 3))
360 printf "(will power up) "
362 if ($$SDSTAT & (1 << 4))
363 printf "(EAB error) "
367 printf "SDGCTL: 0x%08x\n", *(unsigned long *)0xFFC00A10
371 printf "DDRCTL0: 0x%08x\n", *(unsigned long *)0xFFC00A20
372 printf "DDRCTL1: 0x%08x\n", *(unsigned long *)0xFFC00A24
373 printf "DDRCTL2: 0x%08x\n", *(unsigned long *)0xFFC00A28
374 printf "DDRCTL3: 0x%08x\n", *(unsigned long *)0xFFC00A2C
375 printf "DDRQUE: 0x%08x\n", *(unsigned long *)0xFFC00A30
377 output/a *(unsigned long *)0xFFC00A34
380 set $$ERRMST = *(unsigned short *)0xFFC00A38
381 printf "ERRMST: 0x%04x ( ", $$ERRMST
382 if ($$ERRMST & (1 << 7))
383 printf "core_merror "
385 if ($$ERRMST & (1 << 6))
386 printf "deb2_merror "
388 if ($$ERRMST & (1 << 5))
389 printf "deb1_merror "
391 if ($$ERRMST & (1 << 4))
392 printf "deb0_merror "
394 if ($$ERRMST & (1 << 3))
397 if ($$ERRMST & (1 << 2))
400 if ($$ERRMST & (1 << 1))
403 if ($$ERRMST & (1 << 0))
408 set $$RSTCTL = *(unsigned short *)0xFFC00A3C
409 printf "RSTCTL: 0x%04x ( ", $$RSTCTL
410 if ($$RSTCTL & (1 << 4))
413 if ($$RSTCTL & (1 << 3))
416 if (!($$RSTCTL & (1 << 1)))
417 printf "!!! ERROR: bit 1 needs to be 1, but it is 0 !!! "
419 if ($$RSTCTL & (1 << 0))
426 printf "EBIU_AMGCTL: 0x%04x\n", *(unsigned short *)0xFFC00A00
427 printf "EBIU_AMBCTL0: 0x%08x\n", *(unsigned long *)0xFFC00A04
428 printf "EBIU_AMBCTL1: 0x%08x\n", *(unsigned long *)0xFFC00A08
429 printf "EBIU_MBSCTL: 0x%08x\n", *(unsigned long *)0xFFC00A0C
431 set $$EBIU_ARBSTAT = *(unsigned long *)0xFFC00A10
432 printf "EBIU_ARBSTAT: 0x%08x ( ", $$EBIU_ARBSTAT
433 if ($$EBIU_ARBSTAT & (1 << 1))
436 if ($$EBIU_ARBSTAT & (1 << 0))
441 printf "EBIU_MODE: 0x%08x\n", *(unsigned long *)0xFFC00A14
442 printf "EBIU_FCTL: 0x%08x\n", *(unsigned long *)0xFFC00A18
446 set $$cec = *(unsigned long *)$arg0
447 printf "0x%08x: ", $$cec
448 if ($$cec & (1 << 0))
453 if ($$cec & (1 << 1))
458 if ($$cec & (1 << 2))
463 if ($$cec & (1 << 3))
468 if ($$cec & (1 << 4))
473 if ($$cec & (1 << 5))
478 if ($$cec & (1 << 6))
485 if ($$cec & (1 << $$ceci))
486 printf "G%i ", $$ceci
493 set $$ceci = $$ceci + 1
505 set $$EVT = 0xFFE02000
508 printf "EVT%-2i ", $$EVTi
509 output/a *(unsigned long *)($$EVT + $$EVTi * 4)
511 set $$EVTi = $$EVTi + 1
520 set $$data_val = *(unsigned long *)($$data + $$i * 4)
521 printf " 0x%08x 0x%08x ( ", *(unsigned long *)($$addr + $$i * 4), $$data_val
522 if (($$data_val & (0x3 << 16)) == (0x0 << 16))
525 if (($$data_val & (0x3 << 16)) == (0x1 << 16))
528 if (($$data_val & (0x3 << 16)) == (0x2 << 16))
531 if (($$data_val & (0x3 << 16)) == (0x3 << 16))
534 if ($$data_val & (0x1 << 14))
539 if ($$data_val & (0x1 << 7))
542 if ($$data_val & (0x1 << 4))
545 if ($$data_val & (0x1 << 3))
548 if ($$data_val & (0x1 << 2))
551 if ($$data_val & (0x1 << 1))
554 if ($$data_val & (0x1 << 0))
564 set $$IMEM_CONTROL = 0xFFE01004
565 printf "ICPLBS (0x%08x)\n", *(unsigned long *)$$IMEM_CONTROL
566 _show_cplbs 0xFFE01100 0xFFE01200
569 set $$DMEM_CONTROL = 0xFFE00004
570 printf "DCPLBS (0x%08x)\n", *(unsigned long *)$$DMEM_CONTROL
571 _show_cplbs 0xFFE00100 0xFFE00200
578 define _show_cplbstatus
579 set $$CPLB_STATUS = *(unsigned long *)$arg0
580 printf " STATUS = 0x%08x ( ", $$CPLB_STATUS
581 if ($$CPLB_STATUS & (1 << 19))
584 if ($$CPLB_STATUS & (1 << 18))
589 if ($$CPLB_STATUS & (1 << 17))
594 if ($$CPLB_STATUS & (1 << 16))
601 if ($$CPLB_STATUS & (1 << $$i))
608 set $$CPLB_FAULT_ADDR = *(unsigned long *)$arg1
609 printf " FAULT_ADDR = "
610 output/a $$CPLB_FAULT_ADDR
613 define show_icplbstatus
614 printf "ICPLB Status\n"
615 _show_cplbstatus 0xFFE01008 0xFFE0100C
617 define show_dcplbstatus
618 printf "DCPLB Status\n"
619 _show_cplbstatus 0xFFE00008 0xFFE0000C
621 define show_cplbstatus
628 set $r0 = $r1 = $r2 = $r3 = $r4 = $r5 = $r6 = $r7 = 0xffb00000
629 set $sp = $fp = $usp = $r0 + 0x100
630 set $p0 = $p1 = $p2 = $p3 = $p4 = $p5 = 0xffa00000
631 set $pc = $rets = $reti = $retx = $retn = $p0
632 set $lt0 = $lt1 = $lb0 = $lb1 = 1
634 set $i0 = $i1 = $i2 = $i3 = $r0
635 set $b0 = $b1 = $b2 = $b3 = $r0
636 set $l0 = $l1 = $l2 = $l3 = $r0
637 set $m0 = $m1 = $m2 = $m3 = $r0
641 set $$DMA_BASE = $arg0
642 set $$NEXT_DESC_PTR = *(unsigned long *) ($$DMA_BASE + 0x00)
643 set $$START_ADDR = *(unsigned long *) ($$DMA_BASE + 0x04)
644 set $$CONFIG = *(unsigned short *) ($$DMA_BASE + 0x08)
645 set $$X_COUNT = *(unsigned short *) ($$DMA_BASE + 0x10)
646 set $$X_MODIFY = *(unsigned short *) ($$DMA_BASE + 0x14)
647 set $$Y_COUNT = *(unsigned short *) ($$DMA_BASE + 0x18)
648 set $$Y_MODIFY = *(unsigned short *) ($$DMA_BASE + 0x1C)
649 set $$CURR_DESC_PTR = *(unsigned long *) ($$DMA_BASE + 0x20)
650 set $$CURR_ADDR = *(unsigned long *) ($$DMA_BASE + 0x24)
651 set $$IRQ_STATUS = *(unsigned short *) ($$DMA_BASE + 0x28)
652 set $$CURR_X_COUNT = *(unsigned short *) ($$DMA_BASE + 0x30)
653 set $$CURR_Y_COUNT = *(unsigned short *) ($$DMA_BASE + 0x38)
654 printf "desc: curr: 0x%08x next: 0x%08x\n", $$CURR_DESC_PTR, $$NEXT_DESC_PTR
655 printf "addr: curr: 0x%08x start: 0x%08x\n", $$CURR_ADDR, $$START_ADDR
656 printf "X: curr: 0x%04x count: 0x%04x mod: 0x%04x (%i)\n", $$CURR_X_COUNT, $$X_COUNT, $$X_MODIFY, (short)$$X_MODIFY
657 printf "Y: curr: 0x%04x count: 0x%04x mod: 0x%04x (%i)\n", $$CURR_Y_COUNT, $$Y_COUNT, $$Y_MODIFY, (short)$$Y_MODIFY
658 printf "dma config: 0x%04x (", $$CONFIG
659 if ($$CONFIG & (1 << 0))
664 if ($$CONFIG & (0x1 << 1))
669 set $$WDSIZE = ($$CONFIG & (0x3 << 2)) >> 2
671 printf "WDSIZE:INVALID "
682 if ($$CONFIG & (0x1 << 4))
687 if ($$CONFIG & (0x1 << 5))
690 if ($$CONFIG & (0x1 << 6))
693 if ($$CONFIG & (0x1 << 7))
696 set $$NDSIZE = ($$CONFIG & (0xF << 8)) >> 8
697 if ($$NDSIZE > 0 && $$NDSIZE < 10)
698 printf "NDSIZE_%i ", $$NDSIZE
701 printf "NDSIZE:INVALID:%i ", $$NDSIZE
703 set $$FLOW = ($$CONFIG & (0x7 << 12)) >> 12
711 printf "descriptor_array"
714 printf "descriptor_list_small"
717 printf "descriptor_list_large"
719 printf "FLOW:INVALID:%i", $$FLOW
726 printf "irq status: 0x%04x (", $$IRQ_STATUS
727 if ($$IRQ_STATUS & (0x1 << 0))
730 if ($$IRQ_STATUS & (0x1 << 1))
733 if ($$IRQ_STATUS & (0x1 << 2))
736 if ($$IRQ_STATUS & (0x1 << 3))
743 set $$CTIMER = 0xFFE03000
744 set $$TCNTL = *(unsigned long *) ($$CTIMER + 0x0)
745 set $$TPERIOD = *(unsigned long *) ($$CTIMER + 0x4)
746 set $$TSCALE = *(unsigned long *) ($$CTIMER + 0x8)
747 set $$TCOUNT = *(unsigned long *) ($$CTIMER + 0xC)
748 printf "TCNTL: %#x ( ", $$TCNTL
749 if ($$TCNTL & (1 << 0))
752 if ($$TCNTL & (1 << 1))
755 if ($$TCNTL & (1 << 2))
758 if ($$TCNTL & (1 << 3))
759 printf "int-enabled "
762 printf "TPERIOD: %#x\n", $$TPERIOD
763 printf "TSCALE: %#x\n", $$TSCALE
764 printf "TCOUNT: %#x\n", $$TCOUNT
769 set $$SPI_BASE = $arg0
771 set $$SPI_BASE = 0xFFC00500
773 set $$SPI_BAUD = *(unsigned short *) ($$SPI_BASE + 0x14)
774 set $$SPI_CTL = *(unsigned short *) ($$SPI_BASE + 0x00)
775 set $$SPI_FLG = *(unsigned short *) ($$SPI_BASE + 0x04)
776 set $$SPI_STAT = *(unsigned short *) ($$SPI_BASE + 0x08)
777 set $$SPI_TDBR = *(unsigned short *) ($$SPI_BASE + 0x0C)
778 set $$SPI_RDBR = *(unsigned short *) ($$SPI_BASE + 0x10)
779 set $$SPI_SHAD = *(unsigned short *) ($$SPI_BASE + 0x18)
780 printf "BAUD: %04x (%i)\n", $$SPI_BAUD, $$SPI_BAUD
781 printf "CTL: %04x (", $$SPI_CTL
782 set $$TIMOD = $$SPI_CTL & 0x3
783 printf "timod:%i ", $$TIMOD
784 if ($$SPI_CTL & (1 << 2))
787 if ($$SPI_CTL & (1 << 3))
790 if ($$SPI_CTL & (1 << 4))
793 if ($$SPI_CTL & (1 << 5))
796 if ($$SPI_CTL & (1 << 8))
801 if ($$SPI_CTL & (1 << 9))
804 if ($$SPI_CTL & (1 << 10))
807 if ($$SPI_CTL & (1 << 11))
810 if ($$SPI_CTL & (1 << 12))
815 if ($$SPI_CTL & (1 << 13))
818 if ($$SPI_CTL & (1 << 14))
824 printf "STAT: %04x (", $$SPI_STAT
825 if ($$SPI_STAT & (1 << 0))
828 if ($$SPI_STAT & (1 << 1))
831 if ($$SPI_STAT & (1 << 2))
834 if ($$SPI_STAT & (1 << 3))
837 if ($$SPI_STAT & (1 << 4))
840 if ($$SPI_STAT & (1 << 5))
843 if ($$SPI_STAT & (1 << 6))
847 printf "FLG: %04x\n", $$SPI_FLG
848 printf "TDBR: %04x RDBR: %04x\n", $$SPI_TDBR, $$SPI_SHAD
853 printf "LCR: 0x%02x ( ", $$LCR
854 set $$WLS = $$LCR & 0x3
867 if ($$LCR & (1 << 2))
870 if ($$LCR & (1 << 3))
873 if ($$LCR & (1 << 4))
876 if ($$LCR & (1 << 5))
879 if ($$LCR & (1 << 6))
887 printf "LSR: 0x%02x ( ", $$LSR
888 if ($$LSR & (1 << 0))
891 if ($$LSR & (1 << 1))
894 if ($$LSR & (1 << 2))
897 if ($$LSR & (1 << 3))
900 if ($$LSR & (1 << 4))
903 if ($$LSR & (1 << 5))
906 if ($$LSR & (1 << 6))
909 if ($$LSR & (1 << 7))
917 printf "IER: 0x%02x ( ", $$IER
918 if ($$IER & (1 << 0))
921 if ($$IER & (1 << 1))
924 if ($$IER & (1 << 2))
927 if ($$IER & (1 << 3))
930 if ($$IER & (1 << 4))
933 if ($$IER & (1 << 5))
936 if ($$IER & (1 << 6))
944 printf "MCR: 0x%02x ( ", $$MCR
945 if ($$MCR & (1 << 0))
948 if ($$MCR & (1 << 1))
951 if ($$MCR & (1 << 2))
954 if ($$MCR & (1 << 3))
957 if ($$MCR & (1 << 4))
960 if ($$MCR & (1 << 5))
963 if ($$MCR & (1 << 6))
966 if ($$MCR & (1 << 7))
974 printf "MSR: 0x%02x ( ", $$MSR
975 if ($$MSR & (1 << 0))
978 if ($$MSR & (1 << 4))
981 if ($$MSR & (1 << 5))
987 define show_uart_gctl
989 printf "GCTL: 0x%02x ( ", $$GCTL
990 if ($$GCTL & (1 << 0))
993 if ($$GCTL & (1 << 1))
996 if ($$GCTL & (1 << 2))
999 if ($$GCTL & (1 << 3))
1002 if ($$GCTL & (1 << 4))
1005 if ($$GCTL & (1 << 5))
1008 if ($$GCTL & (1 << 6))
1011 if ($$GCTL & (1 << 7))
1019 set $$UART_BASE = $arg0
1021 set $$UART_BASE = 0xffc00400
1023 set $$UART_DLL = (unsigned short *) ($$UART_BASE + 0x00)
1024 set $$UART_RBR = (unsigned short *) ($$UART_BASE + 0x00)
1025 set $$UART_DLH = (unsigned short *) ($$UART_BASE + 0x04)
1026 set $$UART_IER = (unsigned short *) ($$UART_BASE + 0x04)
1027 set $$UART_IIR = (unsigned short *) ($$UART_BASE + 0x08)
1028 set $$UART_LCR = (unsigned short *) ($$UART_BASE + 0x0C)
1029 set $$UART_MCR = (unsigned short *) ($$UART_BASE + 0x10)
1030 set $$UART_LSR = (unsigned short *) ($$UART_BASE + 0x14)
1031 set $$UART_MSR = (unsigned short *) ($$UART_BASE + 0x18)
1032 set $$UART_SCR = (unsigned short *) ($$UART_BASE + 0x1C)
1033 set $$UART_GCTL = (unsigned short *) ($$UART_BASE + 0x24)
1035 set $$DLAB = (1 << 7)
1036 set $$LCR = *$$UART_LCR
1037 set *$$UART_LCR = ($$LCR | $$DLAB)
1038 printf "DLL: 0x%02x DLH: 0x%02x\n", *$$UART_DLL, *$$UART_DLH
1039 set *$$UART_LCR = $$LCR & ~$$DLAB
1040 printf "RBR: 0x%02x SCR: 0x%02x\n", *$$UART_RBR, *$$UART_SCR
1041 set *$$UART_LCR = $$LCR
1043 printf "IIR: 0x%02x ", *$$UART_IIR
1044 show_uart_ier *$$UART_IER
1046 show_uart_mcr *$$UART_MCR
1047 show_uart_lsr *$$UART_LSR
1048 show_uart_msr *$$UART_MSR
1049 show_uart_gctl *$$UART_GCTL
1054 set $$UART_BASE = $arg0
1056 set $$UART_BASE = 0xffc00400
1058 set $$UART_DLL = (unsigned short *) ($$UART_BASE + 0x00)
1059 set $$UART_DLH = (unsigned short *) ($$UART_BASE + 0x04)
1060 set $$UART_GCTL = (unsigned short *) ($$UART_BASE + 0x08)
1061 set $$UART_LCR = (unsigned short *) ($$UART_BASE + 0x0C)
1062 set $$UART_MCR = (unsigned short *) ($$UART_BASE + 0x10)
1063 set $$UART_LSR = (unsigned short *) ($$UART_BASE + 0x14)
1064 set $$UART_MSR = (unsigned short *) ($$UART_BASE + 0x18)
1065 set $$UART_SCR = (unsigned short *) ($$UART_BASE + 0x1C)
1066 set $$UART_IER = (unsigned short *) ($$UART_BASE + 0x20)
1067 set $$UART_RBR = (unsigned short *) ($$UART_BASE + 0x2C)
1069 printf "DLL: 0x%02x DLH: 0x%02x\n", *$$UART_DLL, *$$UART_DLH
1070 printf "RBR: 0x%02x SCR: 0x%02x\n", *$$UART_RBR, *$$UART_SCR
1073 show_uart_ier *$$UART_IER
1074 show_uart_lcr *$$UART_LCR
1075 show_uart_mcr *$$UART_MCR
1076 show_uart_lsr *$$UART_LSR
1077 show_uart_msr *$$UART_MSR
1078 show_uart_gctl *$$UART_GCTL
1083 set $$UART_BASE = $arg0
1085 set $$UART_BASE = 0xffc02000
1087 set $$UART_REVID = (unsigned long *) ($$UART_BASE + 0x00)
1088 set $$UART_CTL = (unsigned long *) ($$UART_BASE + 0x04)
1089 set $$UART_STAT = (unsigned long *) ($$UART_BASE + 0x08)
1090 set $$UART_SCR = (unsigned long *) ($$UART_BASE + 0x0C)
1091 set $$UART_CLK = (unsigned long *) ($$UART_BASE + 0x10)
1092 set $$UART_IMASK = (unsigned long *) ($$UART_BASE + 0x14)
1093 set $$UART_RBR = (unsigned long *) ($$UART_BASE + 0x20)
1094 set $$UART_THR = (unsigned long *) ($$UART_BASE + 0x24)
1095 set $$UART_TAIP = (unsigned long *) ($$UART_BASE + 0x28)
1096 set $$UART_TSR = (unsigned long *) ($$UART_BASE + 0x2C)
1097 set $$UART_RSR = (unsigned long *) ($$UART_BASE + 0x30)
1098 set $$UART_TXCNT = (unsigned long *) ($$UART_BASE + 0x34)
1099 set $$UART_RXCNT = (unsigned long *) ($$UART_BASE + 0x38)
1101 printf "REVID: 0x%08x SCR: 0x%08x\n", *$$UART_REVID, *$$UART_SCR
1102 printf " CLK: 0x%08x TAIP: 0x%08x\n", *$$UART_CLK, *$$UART_TAIP
1104 set $$CTL = *$$UART_CTL
1105 printf " CTL: 0x%08x ( ", $$CTL
1106 if ($$CTL & (1 << 0))
1109 if ($$CTL & (1 << 1))
1112 set $$UMOD = ($$CTL & (3 << 4)) >> 4
1126 set $$WLS = ($$CTL & (3 << 8)) >> 8
1140 if ($$CTL & (1 << 12))
1143 if ($$CTL & (1 << 13))
1146 if ($$CTL & (1 << 14))
1149 if ($$CTL & (1 << 15))
1152 if ($$CTL & (1 << 16))
1155 if ($$CTL & (1 << 17))
1158 if ($$CTL & (1 << 18))
1161 if ($$CTL & (1 << 19))
1164 if ($$CTL & (1 << 22))
1167 if ($$CTL & (1 << 23))
1170 if ($$CTL & (1 << 24))
1173 if ($$CTL & (1 << 25))
1176 if ($$CTL & (1 << 26))
1179 if ($$CTL & (1 << 27))
1182 if ($$CTL & (1 << 28))
1185 if ($$CTL & (1 << 29))
1188 if ($$CTL & (1 << 30))
1193 set $$STAT = *$$UART_STAT
1194 printf " STAT: 0x%08x ( ", $$STAT
1195 if ($$STAT & (1 << 0))
1198 if ($$STAT & (1 << 1))
1201 if ($$STAT & (1 << 2))
1204 if ($$STAT & (1 << 3))
1207 if ($$STAT & (1 << 4))
1210 if ($$STAT & (1 << 5))
1213 if ($$STAT & (1 << 7))
1216 if ($$STAT & (1 << 8))
1219 if ($$STAT & (1 << 9))
1222 if ($$STAT & (1 << 10))
1225 if ($$STAT & (1 << 11))
1228 if ($$STAT & (1 << 12))
1231 if ($$STAT & (1 << 16))
1234 if ($$STAT & (1 << 17))
1239 printf "IMASK: 0x%08x\n", *$$UART_IMASK
1240 printf " RSR: 0x%04x TSR: 0x%04x\n", *$$UART_RSR, *$$UART_TSR
1241 printf " RBR: 0x%02x THR: 0x%02x\n", *$$UART_RBR, *$$UART_THR
1242 printf "RXCNT: 0x%02x TXCNT: 0x%02x\n", *$$UART_RXCNT, *$$UART_TXCNT
1250 set $$s_mm = (unsigned long *)0xFFB00000
1251 set $$s_m0 = $$s_mm[0]
1252 set $$s_m1 = $$s_mm[1]
1259 set $$s_mm[0] = $$s_m0
1260 set $$s_mm[1] = $$s_m1
1264 set $pc = 0xef00001a
1267 set $r2 = 0xFFB00000
1274 set $$OTP_PAGE = $arg0
1277 printf "OTP Page 0x%02x: ", $$OTP_PAGE
1279 _otp_read $$OTP_PAGE, 0
1280 _otp_read $$OTP_PAGE, 1
1288 printf "0x%02x: ", $$page
1290 printf "%08x %08x ", $$OTP_PAGE_L, $$OTP_PAGE_H
1292 printf "%08x %08x ", $$OTP_PAGE_L, $$OTP_PAGE_H
1300 # Provide U-Boot-style functions in gdb
1303 define uboot_jtag_load
1304 set remotetimeout 300
1308 call memset(&_bss_vma, 0, &_bss_len)